From: Dave Peterson Date: Sun, 26 Mar 2006 09:38:45 +0000 (-0800) Subject: [PATCH] EDAC: cleanup code for clearing initial errors X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=749ede57443b2a7ede2db105145f21047efcea6a;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git [PATCH] EDAC: cleanup code for clearing initial errors Fix xxx_probe1() functions so they call xxx_get_error_info() functions to clear initial errors. This is simpler and cleaner than duplicating the low-level code for accessing PCI config space. Signed-off-by: David S. Peterson Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c index 6b7a441f0482..821c252d414c 100644 --- a/drivers/edac/amd76x_edac.c +++ b/drivers/edac/amd76x_edac.c @@ -211,6 +211,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) }; u32 ems; u32 ems_mode; + struct amd76x_error_info discard; debugf0("%s()\n", __func__); @@ -270,9 +271,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) csrow->edac_mode = ems_modes[ems_mode]; } - /* clear counters */ - pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, (u32) (0x3 << 8), - (u32) (0x3 << 8)); + amd76x_get_error_info(mci, &discard); /* clear counters */ if (edac_mc_add_mc(mci)) { debugf3("%s(): failed edac_mc_add_mc()\n", __func__); diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index f31725a55e54..24446542d8d6 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c @@ -747,8 +747,6 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) int rc = -ENODEV; int index; u16 pci_data; - u32 stat32; - u16 stat16; u8 stat8; struct mem_ctl_info *mci = NULL; struct e752x_pvt *pvt = NULL; @@ -760,6 +758,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) u32 dra; unsigned long last_cumul_size; struct pci_dev *dev = NULL; + struct e752x_error_info discard; debugf0("%s(): mci\n", __func__); debugf0("Starting Probe1\n"); @@ -938,24 +937,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx) pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00); pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00); /* clear other MCH errors */ - pci_read_config_dword(dev, E752X_FERR_GLOBAL, &stat32); - pci_write_config_dword(dev, E752X_FERR_GLOBAL, stat32); - pci_read_config_dword(dev, E752X_NERR_GLOBAL, &stat32); - pci_write_config_dword(dev, E752X_NERR_GLOBAL, stat32); - pci_read_config_byte(dev, E752X_HI_FERR, &stat8); - pci_write_config_byte(dev, E752X_HI_FERR, stat8); - pci_read_config_byte(dev, E752X_HI_NERR, &stat8); - pci_write_config_byte(dev, E752X_HI_NERR, stat8); - pci_read_config_dword(dev, E752X_SYSBUS_FERR, &stat32); - pci_write_config_dword(dev, E752X_SYSBUS_FERR, stat32); - pci_read_config_byte(dev, E752X_BUF_FERR, &stat8); - pci_write_config_byte(dev, E752X_BUF_FERR, stat8); - pci_read_config_byte(dev, E752X_BUF_NERR, &stat8); - pci_write_config_byte(dev, E752X_BUF_NERR, stat8); - pci_read_config_word(dev, E752X_DRAM_FERR, &stat16); - pci_write_config_word(dev, E752X_DRAM_FERR, stat16); - pci_read_config_word(dev, E752X_DRAM_NERR, &stat16); - pci_write_config_word(dev, E752X_DRAM_NERR, stat16); + e752x_get_error_info(mci, &discard); /* get this far and it's successful */ debugf3("%s(): success\n", __func__); diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c index ec6eb77edaed..8b0da35ae47c 100644 --- a/drivers/edac/e7xxx_edac.c +++ b/drivers/edac/e7xxx_edac.c @@ -357,7 +357,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ u32 dra; unsigned long last_cumul_size; - + struct e7xxx_error_info discard; debugf0("%s(): mci\n", __func__); @@ -470,8 +470,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) pvt->tolm, pvt->remapbase, pvt->remaplimit); /* clear any pending errors, or initial state bits */ - pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_FERR, 0x03, 0x03); - pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03); + e7xxx_get_error_info(mci, &discard); if (edac_mc_add_mc(mci) != 0) { debugf3("%s(): failed edac_mc_add_mc()\n", __func__); diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 499ac90ad67e..eac09cc86aac 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c @@ -2095,9 +2095,6 @@ static int __init edac_mc_init(void) */ clear_pci_parity_errors(); - /* perform check for first time to harvest boot leftovers */ - do_edac_check(); - /* Create the MC sysfs entires */ if (edac_sysfs_memctrl_setup()) { edac_printk(KERN_ERR, EDAC_MC, diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c index e832778fc603..942129df0212 100644 --- a/drivers/edac/i82860_edac.c +++ b/drivers/edac/i82860_edac.c @@ -134,6 +134,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) int index; struct mem_ctl_info *mci = NULL; unsigned long last_cumul_size; + struct i82860_error_info discard; u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ @@ -200,8 +201,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx) csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE; } - /* clear counters */ - pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003); + i82860_get_error_info(mci, &discard); /* clear counters */ if (edac_mc_add_mc(mci)) { debugf3("%s(): failed edac_mc_add_mc()\n", __func__); diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c index c521178183de..40ba2be6169a 100644 --- a/drivers/edac/i82875p_edac.c +++ b/drivers/edac/i82875p_edac.c @@ -286,6 +286,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) u32 drc_chan; /* Number of channels 0=1chan,1=2chan */ u32 nr_chans; u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ + struct i82875p_error_info discard; debugf0("%s()\n", __func__); @@ -397,8 +398,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE; } - /* clear counters */ - pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081); + i82875p_get_error_info(mci, &discard); /* clear counters */ if (edac_mc_add_mc(mci)) { debugf3("%s(): failed edac_mc_add_mc()\n", __func__); diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c index ac1359828e78..787a7652c7ef 100644 --- a/drivers/edac/r82600_edac.c +++ b/drivers/edac/r82600_edac.c @@ -219,7 +219,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) u32 scrub_disabled; u32 sdram_refresh_rate; u32 row_high_limit_last = 0; - u32 eap_init_bits; + struct r82600_error_info discard; debugf0("%s()\n", __func__); @@ -311,8 +311,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) row_high_limit_last = row_high_limit; } - /* clear counters */ - /* FIXME should we? */ + r82600_get_error_info(mci, &discard); /* clear counters */ if (edac_mc_add_mc(mci)) { debugf3("%s(): failed edac_mc_add_mc()\n", __func__); @@ -321,19 +320,12 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx) /* get this far and it's successful */ - /* Clear error flags to allow next error to be reported [p.62] */ - /* Test systems seem to always have the UE flag raised on boot */ - - eap_init_bits = BIT(0) & BIT(1); if (disable_hardware_scrub) { - eap_init_bits |= BIT(31); debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n", __func__); + pci_write_bits32(mci->pdev, R82600_EAP, BIT(31), BIT(31)); } - pci_write_bits32(mci->pdev, R82600_EAP, eap_init_bits, - eap_init_bits); - debugf3("%s(): success\n", __func__); return 0;