From: Magnus Damm Date: Thu, 24 Apr 2008 12:47:15 +0000 (+0900) Subject: sh: no high level trigger on some sh3 cpus X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=720be99006c5830970d5b62633c92b29e4cef137;p=GitHub%2Fmt8127%2Fandroid_kernel_alcatel_ttab.git sh: no high level trigger on some sh3 cpus The processor models sh7706, sh7707 and sh7709 don't support high level trigger sense configuration. And the intc code looks like crap these days so what's the difference. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c index df3695406d80..e5a4912d665f 100644 --- a/arch/sh/kernel/cpu/irq/intc.c +++ b/arch/sh/kernel/cpu/irq/intc.c @@ -302,7 +302,12 @@ static unsigned char intc_irq_sense_table[IRQ_TYPE_SENSE_MASK + 1] = { [IRQ_TYPE_EDGE_FALLING] = VALID(0), [IRQ_TYPE_EDGE_RISING] = VALID(1), [IRQ_TYPE_LEVEL_LOW] = VALID(2), + /* SH7706, SH7707 and SH7709 do not support high level triggered */ +#if !defined(CONFIG_CPU_SUBTYPE_SH7706) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7707) && \ + !defined(CONFIG_CPU_SUBTYPE_SH7709) [IRQ_TYPE_LEVEL_HIGH] = VALID(3), +#endif }; static int intc_set_sense(unsigned int irq, unsigned int type)