From: Markos Chandras Date: Wed, 1 Jul 2015 08:13:32 +0000 (+0100) Subject: MIPS: kernel: cps-vec: Replace KSEG0 with CKSEG0 X-Git-Tag: MMI-PSA29.97-13-9~9736^2~7 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=717f14255a52ad445d6f0eca7d0f22f59d6ba1f8;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git MIPS: kernel: cps-vec: Replace KSEG0 with CKSEG0 In preparation for 64-bit CPS support, we replace KSEG0 with CKSEG0 so 64-bit kernels can be supported. Cc: # 3.16+ Reviewed-by: Paul Burton Signed-off-by: Markos Chandras Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10590/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index 21f714a81ebd..2f95568e0da5 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -107,7 +107,7 @@ not_nmi: mul t1, t1, t0 mul t1, t1, t2 - li a0, KSEG0 + li a0, CKSEG0 add a1, a0, t1 1: cache Index_Store_Tag_I, 0(a0) add a0, a0, t0 @@ -134,7 +134,7 @@ icache_done: mul t1, t1, t0 mul t1, t1, t2 - li a0, KSEG0 + li a0, CKSEG0 addu a1, a0, t1 subu a1, a1, t0 1: cache Index_Store_Tag_D, 0(a0)