From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu, 16 Apr 2015 18:58:29 +0000 (-0500)
Subject: Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64... 
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=714d8e7e27197dd39b2550e762a6a6fcf397a471;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge tag 'arm64-upstream' of git://git./linux/kernel/git/arm64/linux

Pull arm64 updates from Will Deacon:
 "Here are the core arm64 updates for 4.1.

  Highlights include a significant rework to head.S (allowing us to boot
  on machines with physical memory at a really high address), an AES
  performance boost on Cortex-A57 and the ability to run a 32-bit
  userspace with 64k pages (although this requires said userspace to be
  built with a recent binutils).

  The head.S rework spilt over into KVM, so there are some changes under
  arch/arm/ which have been acked by Marc Zyngier (KVM co-maintainer).
  In particular, the linker script changes caused us some issues in
  -next, so there are a few merge commits where we had to apply fixes on
  top of a stable branch.

  Other changes include:

   - AES performance boost for Cortex-A57
   - AArch32 (compat) userspace with 64k pages
   - Cortex-A53 erratum workaround for #845719
   - defconfig updates (new platforms, PCI, ...)"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (39 commits)
  arm64: fix midr range for Cortex-A57 erratum 832075
  arm64: errata: add workaround for cortex-a53 erratum #845719
  arm64: Use bool function return values of true/false not 1/0
  arm64: defconfig: updates for 4.1
  arm64: Extract feature parsing code from cpu_errata.c
  arm64: alternative: Allow immediate branch as alternative instruction
  arm64: insn: Add aarch64_insn_decode_immediate
  ARM: kvm: round HYP section to page size instead of log2 upper bound
  ARM: kvm: assert on HYP section boundaries not actual code size
  arm64: head.S: ensure idmap_t0sz is visible
  arm64: pmu: add support for interrupt-affinity property
  dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity
  arm64: head.S: ensure visibility of page tables
  arm64: KVM: use ID map with increased VA range if required
  arm64: mm: increase VA range of identity map
  ARM: kvm: implement replacement for ld's LOG2CEIL()
  arm64: proc: remove unused cpu_get_pgd macro
  arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol
  arm64: remove __calc_phys_offset
  arm64: merge __enable_mmu and __turn_mmu_on
  ...
---

714d8e7e27197dd39b2550e762a6a6fcf397a471
diff --cc arch/arm64/include/asm/page.h
index 8fc8fa280e92,3d02b1869eb8..7d9c7e4a424b
--- a/arch/arm64/include/asm/page.h
+++ b/arch/arm64/include/asm/page.h
@@@ -33,12 -33,14 +33,14 @@@
   * image. Both require pgd, pud (4 levels only) and pmd tables to (section)
   * map the kernel. With the 64K page configuration, swapper and idmap need to
   * map to pte level. The swapper also maps the FDT (see __create_page_tables
-  * for more information).
+  * for more information). Note that the number of ID map translation levels
+  * could be increased on the fly if system RAM is out of reach for the default
+  * VA range, so 3 pages are reserved in all cases.
   */
  #ifdef CONFIG_ARM64_64K_PAGES
 -#define SWAPPER_PGTABLE_LEVELS	(CONFIG_ARM64_PGTABLE_LEVELS)
 +#define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS)
  #else
 -#define SWAPPER_PGTABLE_LEVELS	(CONFIG_ARM64_PGTABLE_LEVELS - 1)
 +#define SWAPPER_PGTABLE_LEVELS	(CONFIG_PGTABLE_LEVELS - 1)
  #endif
  
  #define SWAPPER_DIR_SIZE	(SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)
diff --cc arch/arm64/include/asm/proc-fns.h
index 941c375616e2,4d9ede7b6361..220633b791b8
--- a/arch/arm64/include/asm/proc-fns.h
+++ b/arch/arm64/include/asm/proc-fns.h
@@@ -39,21 -39,8 +39,12 @@@ extern u64 cpu_do_resume(phys_addr_t pt
  
  #include <asm/memory.h>
  
 -#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
 +#define cpu_switch_mm(pgd,mm)				\
 +do {							\
 +	BUG_ON(pgd == swapper_pg_dir);			\
 +	cpu_do_switch_mm(virt_to_phys(pgd),mm);		\
 +} while (0)
  
- #define cpu_get_pgd()					\
- ({							\
- 	unsigned long pg;				\
- 	asm("mrs	%0, ttbr0_el1\n"		\
- 	    : "=r" (pg));				\
- 	pg &= ~0xffff000000003ffful;			\
- 	(pgd_t *)phys_to_virt(pg);			\
- })
- 
  #endif /* __ASSEMBLY__ */
  #endif /* __KERNEL__ */
  #endif /* __ASM_PROCFNS_H */