From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Tue, 5 Aug 2014 09:27:13 +0000 (+0100)
Subject: Merge branches 'fixes' and 'misc' into for-next
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=7109561524dc57b95fd3f9b61547268b9b6db8ed;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

Merge branches 'fixes' and 'misc' into for-next

Conflicts:
	arch/arm/kernel/iwmmxt.S
	arch/arm/mm/cache-l2x0.c
	arch/arm/mm/mmu.c
---

7109561524dc57b95fd3f9b61547268b9b6db8ed
diff --cc arch/arm/kernel/iwmmxt.S
index 2b32978ae905,0960be7953f0..ad58e565fe98
--- a/arch/arm/kernel/iwmmxt.S
+++ b/arch/arm/kernel/iwmmxt.S
@@@ -94,13 -94,10 +94,13 @@@ ENTRY(iwmmxt_task_enable
  
  	mrc	p15, 0, r2, c2, c0, 0
  	mov	r2, r2				@ cpwait
 +	bl	concan_save
  
 -	teq	r1, #0				@ test for last ownership
 -	mov	lr, r9				@ normal exit from exception
 -	beq	concan_load			@ no owner, skip save
 +#ifdef CONFIG_PREEMPT_COUNT
 +	get_thread_info r10
 +#endif
 +4:	dec_preempt_count r10, r3
- 	mov	pc, r9				@ normal exit from exception
++	ret	r9				@ normal exit from exception
  
  concan_save:
  
@@@ -144,7 -138,7 +144,7 @@@ concan_dump
  	wstrd	wR15, [r1, #MMX_WR15]
  
  2:	teq	r0, #0				@ anything to load?
- 	moveq	pc, lr				@ if not, return
 -	beq	3f
++	reteq	lr				@ if not, return
  
  concan_load:
  
@@@ -177,10 -171,15 +177,10 @@@
  	@ clear CUP/MUP (only if r1 != 0)
  	teq	r1, #0
  	mov 	r2, #0
- 	moveq	pc, lr
 -	beq	3f
 -	tmcr	wCon, r2
++	reteq	lr
  
 -3:
 -#ifdef CONFIG_PREEMPT_COUNT
 -	get_thread_info r10
 -#endif
 -4:	dec_preempt_count r10, r3
 +	tmcr	wCon, r2
- 	mov	pc, lr
+ 	ret	lr
  
  /*
   * Back up Concan regs to save area and disable access to them
diff --cc arch/arm/mm/cache-l2x0.c
index 7c3fb41a462e,556df22e89bd..5f2c988a06ac
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@@ -664,8 -664,8 +664,8 @@@ static int l2c310_cpu_enable_flz(struc
  
  static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
  {
 -	unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK;
 +	unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
- 	bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
+ 	bool cortex_a9 = read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
  
  	if (rev >= L310_CACHE_ID_RTL_R2P0) {
  		if (cortex_a9) {