From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Tue, 4 Jul 2017 15:23:18 +0000 (+0200)
Subject: ARM: dts: r8a7794: Add Inter Connect RAM
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=709f8d26223ee4ed7d9c43d9f80c792b6ee18220;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

ARM: dts: r8a7794: Add Inter Connect RAM

R-Car E2 has 2 regions of Inter Connect RAM (72 + 4 KiB).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---

diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 7d9a81d970d8..78973cee7185 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi
@@ -588,6 +588,16 @@
 		status = "disabled";
 	};
 
+	icram0:	sram@e63a0000 {
+		compatible = "mmio-sram";
+		reg = <0 0xe63a0000 0 0x12000>;
+	};
+
+	icram1:	sram@e63c0000 {
+		compatible = "mmio-sram";
+		reg = <0 0xe63c0000 0 0x1000>;
+	};
+
 	ether: ethernet@ee700000 {
 		compatible = "renesas,ether-r8a7794";
 		reg = <0 0xee700000 0 0x400>;