From: Marc Kleine-Budde Date: Thu, 27 Aug 2015 12:24:48 +0000 (+0200) Subject: can: flexcan: enable interrupts atomically at the end of flexcan_chip_start() X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=6fa7da249269a6146ce456c43098901c81c8afdf;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git can: flexcan: enable interrupts atomically at the end of flexcan_chip_start() This patch defers the writing of the interrupts bits of the CTRL register order to enables all interrupts atomically at the the of the flexcan_chip_start() function. Suggested-by: Torsten Lang Signed-off-by: Marc Kleine-Budde --- diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index 28b6283aacf2..868fe945e35a 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c @@ -878,6 +878,8 @@ static int flexcan_chip_start(struct net_device *dev) /* save for later use */ priv->reg_ctrl_default = reg_ctrl; + /* leave interrupts disabled for now */ + reg_ctrl &= ~FLEXCAN_CTRL_ERR_ALL; netdev_dbg(dev, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); flexcan_write(reg_ctrl, ®s->ctrl); @@ -937,8 +939,11 @@ static int flexcan_chip_start(struct net_device *dev) priv->can.state = CAN_STATE_ERROR_ACTIVE; - /* enable FIFO interrupts */ + /* enable interrupts atomically */ + disable_irq(dev->irq); + flexcan_write(priv->reg_ctrl_default, ®s->ctrl); flexcan_write(FLEXCAN_IFLAG_DEFAULT, ®s->imask1); + enable_irq(dev->irq); /* print chip status */ netdev_dbg(dev, "%s: reading mcr=0x%08x ctrl=0x%08x\n", __func__,