From: Jeeja KP Date: Fri, 9 Oct 2015 08:01:48 +0000 (+0100) Subject: ASoC: Intel: Skylake: Check CPA bit in DSP core power down X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=6ea8ba33e65d3d284de7e7373939352e2c728f10;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ASoC: Intel: Skylake: Check CPA bit in DSP core power down Skylake driver will set the SPA bit to 0 to turn off the DSP core. Driver will poll the Current Power Active (CPA) bit to match the Set Power Active (SPA) bit value. When CPA bit matches the value of SPA bit, the achieved power state has reached. In case of DSP power down, register that was polled is SPA instead of CPA. This patch corrects the register to be polled in case of DSP power down. Signed-off-by: Jeeja KP Signed-off-by: Vinod Koul Signed-off-by: Mark Brown --- diff --git a/sound/soc/intel/skylake/skl-sst-dsp.c b/sound/soc/intel/skylake/skl-sst-dsp.c index 94875b008b0b..194bd0036454 100644 --- a/sound/soc/intel/skylake/skl-sst-dsp.c +++ b/sound/soc/intel/skylake/skl-sst-dsp.c @@ -175,7 +175,7 @@ static int skl_dsp_core_power_down(struct sst_dsp *ctx) /* poll with timeout to check if operation successful */ return sst_dsp_register_poll(ctx, SKL_ADSP_REG_ADSPCS, - SKL_ADSPCS_SPA_MASK, + SKL_ADSPCS_CPA_MASK, 0, SKL_DSP_PD_TO, "Power down");