From: Ralf Baechle <ralf@linux-mips.org>
Date: Tue, 2 Jul 2013 15:19:04 +0000 (+0200)
Subject: Merge branch '3.10-fixes' into mips-for-linux-next
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=6ac5310e649df5fcd240d764503bf16a1317ea39;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git

Merge branch '3.10-fixes' into mips-for-linux-next

This that should have been fixed but weren't, way to much, intrusive
and late.
---

6ac5310e649df5fcd240d764503bf16a1317ea39
diff --cc arch/mips/cavium-octeon/Makefile
index b703583779fb,e3fd50cc709c..4e952043c922
--- a/arch/mips/cavium-octeon/Makefile
+++ b/arch/mips/cavium-octeon/Makefile
@@@ -12,8 -12,8 +12,8 @@@
  CFLAGS_octeon-platform.o = -I$(src)/../../../scripts/dtc/libfdt
  CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
  
 -obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o
 +obj-y := cpu.o setup.o octeon-platform.o octeon-irq.o csrc-octeon.o
- obj-y += dma-octeon.o flash_setup.o
+ obj-y += dma-octeon.o
  obj-y += octeon-memcpy.o
  obj-y += executive/
  
diff --cc arch/mips/include/uapi/asm/fcntl.h
index 314c79b76d2a,6e9e74648f98..6ca432f00860
--- a/arch/mips/include/uapi/asm/fcntl.h
+++ b/arch/mips/include/uapi/asm/fcntl.h
@@@ -5,9 -5,10 +5,10 @@@
   *
   * Copyright (C) 1995, 96, 97, 98, 99, 2003, 05 Ralf Baechle
   */
 -#ifndef _ASM_FCNTL_H
 -#define _ASM_FCNTL_H
 +#ifndef _UAPI_ASM_FCNTL_H
 +#define _UAPI_ASM_FCNTL_H
  
+ #include <asm/sgidefs.h>
  
  #define O_APPEND	0x0008
  #define O_DSYNC		0x0010	/* used to be O_SYNC, see below */
diff --cc arch/mips/mm/tlbex.c
index 357e0fd65e94,2f88fd3a64cf..9ab0f907a52c
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@@ -2167,9 -2178,23 +2193,23 @@@ static void __cpuinit build_r4000_tlb_m
  	pr_debug("Wrote TLB modify handler fastpath (%u instructions).\n",
  		 (unsigned int)(p - handle_tlbm));
  
 -	dump_handler("r4000_tlb_modify", handle_tlbm, ARRAY_SIZE(handle_tlbm));
 +	dump_handler("r4000_tlb_modify", handle_tlbm, handle_tlbm_size);
  }
  
+ static void __cpuinit flush_tlb_handlers(void)
+ {
+ 	local_flush_icache_range((unsigned long)handle_tlbl,
 -			   (unsigned long)handle_tlbl + sizeof(handle_tlbl));
++			   (unsigned long)handle_tlbl_end);
+ 	local_flush_icache_range((unsigned long)handle_tlbs,
 -			   (unsigned long)handle_tlbs + sizeof(handle_tlbs));
++			   (unsigned long)handle_tlbs_end);
+ 	local_flush_icache_range((unsigned long)handle_tlbm,
 -			   (unsigned long)handle_tlbm + sizeof(handle_tlbm));
++			   (unsigned long)handle_tlbm_end);
+ #ifdef CONFIG_MIPS_PGD_C0_CONTEXT
 -	local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd_array,
 -			   (unsigned long)tlbmiss_handler_setup_pgd_array + sizeof(tlbmiss_handler_setup_pgd_array));
++	local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd,
++			   (unsigned long)tlbmiss_handler_setup_pgd_end);
+ #endif
+ }
+ 
  void __cpuinit build_tlb_refill_handler(void)
  {
  	/*