From: Dave Airlie <airlied@redhat.com>
Date: Mon, 16 May 2011 00:45:40 +0000 (+1000)
Subject: Merge remote branch 'keithp/drm-intel-next' of /ssd/git/drm-next into drm-core-next
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=69f7876b2ab61e8114675d6092ad0b482e233612;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge remote branch 'keithp/drm-intel-next' of /ssd/git/drm-next into drm-core-next

* 'keithp/drm-intel-next' of /ssd/git/drm-next: (301 commits)
  drm/i915: split PCH clock gating init
  drm/i915: add Ivybridge clock gating init function
  drm/i915: Update the location of the ringbuffers' HWS_PGA registers for IVB.
  drm/i915: Add support for fence registers on Ivybridge.
  drm/i915: Use existing function instead of open-coding fence reg clear.
  drm/i915: split clock gating init into per-chipset functions
  drm/i915: set IBX pch type explicitly
  drm/i915: add Ivy Bridge PCI IDs and driver feature structs
  drm/i915: add PantherPoint PCH ID
  agp/intel: add Ivy Bridge support
  drm/i915: ring support for Ivy Bridge
  drm/i915: page flip support for Ivy Bridge
  drm/i915: interrupt & vblank support for Ivy Bridge
  drm/i915: treat Ivy Bridge watermarks like Sandy Bridge
  drm/i915: manual FDI training for Ivy Bridge
  drm/i915: add swizzle/tiling support for Ivy Bridge
  drm/i915: Ivy Bridge has split display and pipe control
  drm/i915: add IS_IVYBRIDGE macro for checks
  drm/i915: add IS_GEN7 macro to cover Ivy Bridge and later
  drm/i915: split enable/disable vblank code into chipset specific functions
  ...
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69f7876b2ab61e8114675d6092ad0b482e233612