From: Bjorn Helgaas Date: Wed, 5 Oct 2016 18:59:14 +0000 (-0500) Subject: Merge branches 'pci/host-aardvark', 'pci/host-altera', 'pci/host-artpec', 'pci/host... X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=69a06e49843b29b296689fa2a7fc320d81aa7c64;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git Merge branches 'pci/host-aardvark', 'pci/host-altera', 'pci/host-artpec', 'pci/host-designware', 'pci/host-hv', 'pci/host-keystone', 'pci/host-rcar', 'pci/host-rockchip', 'pci/host-tegra' and 'pci/host-xilinx' into next * pci/host-aardvark: PCI: aardvark: Remove redundant dev_err call in advk_pcie_probe() * pci/host-altera: PCI: altera: Remove redundant platform_get_resource() return value check PCI: altera: Move retrain from fixup to altera_pcie_host_init() PCI: altera: Rework config accessors for use without a struct pci_bus PCI: altera: Poll for link training status after retraining the link * pci/host-artpec: PCI: artpec6: Drop __init from artpec6_add_pcie_port() * pci/host-designware: PCI: designware: Remove redundant platform_get_resource() return value check PCI: designware: Exchange viewport of `MEMORYs' and `CFGs/IOs' PCI: designware: Keep viewport fixed for IO transaction if num_viewport > 2 PCI: designware: Check LTSSM training bit before deciding link is up PCI: designware: Add iATU Unroll feature PCI: designware: Wait for iATU enable PCI: designware: Move link wait definitions to .c file PCI: designware: Return data directly from dw_pcie_readl_rc() * pci/host-hv: PCI: hv: Handle hv_pci_generic_compl() error case PCI: hv: Handle vmbus_sendpacket() failure in hv_compose_msi_msg() PCI: hv: Remove the unused 'wrk' in struct hv_pcibus_device PCI: hv: Use pci_function_description[0] in struct definitions PCI: hv: Use zero-length array in struct pci_packet PCI: hv: Use list_move_tail() instead of list_del() + list_add_tail() * pci/host-keystone: PCI: keystone: Propagate request_irq() failure * pci/host-rcar: PCI: rcar: Try increasing PCIe link speed to 5 GT/s at boot PCI: rcar: Fix some checkpatch warnings PCI: rcar: Add multi-MSI support PCI: rcar: Don't disable/unprepare clocks on prepare/enable failure PCI: rcar: Consolidate register space lookup and ioremap * pci/host-rockchip: PCI: rockchip: Fix wrong transmitted FTS count PCI: rockchip: Improve the deassert sequence of four reset pins PCI: rockchip: Increase the Max Credit update interval PCI: rockchip: Add Rockchip PCIe controller support dt-bindings: PCI: rockchip: Add DT bindings for Rockchip PCIe controller * pci/host-tegra: PCI: tegra: Use of_device_get_match_data() PCI: tegra: Remove redundant _data suffix * pci/host-xilinx: microblaze/PCI: Add multidomain support for procfs PCI: xilinx: Dispose of MSI virtual IRQ PCI: xilinx: Clear correct MSI set bit PCI: xilinx: Clear interrupt register for invalid interrupt PCI: xilinx: Keep both legacy and MSI interrupt domain references PCI: xilinx-nwl: Enable all MSI interrupts using MSI mask PCI: xilinx-nwl: Expand error logging Conflicts: drivers/pci/host/pcie-xilinx.c --- 69a06e49843b29b296689fa2a7fc320d81aa7c64 diff --cc drivers/pci/host/pcie-rcar.c index 5f7fcc971cae,65db7a221509,65db7a221509,65db7a221509,65db7a221509,65db7a221509,65db7a221509,6db53267dfbd,65db7a221509,65db7a221509,65db7a221509..e06b1d3b4dea --- a/drivers/pci/host/pcie-rcar.c +++ b/drivers/pci/host/pcie-rcar.c @@@@@@@@@@@@ -945,9 -945,9 -945,9 -945,9 -945,9 -945,9 -945,9 -1085,10 -945,9 -945,9 -945,9 +1085,10 @@@@@@@@@@@@ static int rcar_pcie_parse_request_of_p struct device *dev = pci->dev; struct device_node *np = dev->of_node; resource_size_t iobase; ---------- struct resource_entry *win; ++++++++++ struct resource_entry *win, *tmp; ------- --- err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources, &iobase); +++++++ +++ err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources, +++++++ +++ &iobase); if (err) return err; diff --cc drivers/pci/host/pcie-xilinx.c index 0205662720cb,a30e01639557,a30e01639557,a30e01639557,a30e01639557,a30e01639557,a30e01639557,a30e01639557,a30e01639557,a30e01639557,a276fa657c95..be568039d9d0 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@@@@@@@@@@@ -498,6 -505,35 -505,35 -505,35 -505,35 -505,35 -505,35 -505,35 -505,35 -505,35 -511,37 +504,6 @@@@@@@@@@@@ error return IRQ_HANDLED; } ----------/** ---------- * xilinx_pcie_free_irq_domain - Free IRQ domain ---------- * @port: PCIe port information ---------- */ ----------static void xilinx_pcie_free_irq_domain(struct xilinx_pcie_port *port) ----------{ ---------- int i; ---------- u32 irq, num_irqs; ---------- ---------- /* Free IRQ Domain */ ---------- if (IS_ENABLED(CONFIG_PCI_MSI)) { ---------- ---------- free_pages(port->msi_pages, 0); ---------- ---------- num_irqs = XILINX_NUM_MSI_IRQS; ---------- } else { ---------- /* INTx */ ---------- num_irqs = 4; ---------- } ---------- ---------- for (i = 0; i < num_irqs; i++) { --------- irq = irq_find_mapping(port->irq_domain, i); - irq = irq_find_mapping(port->leg_domain, i); ---------- if (irq > 0) ---------- irq_dispose_mapping(irq); ---------- } --------- --------- irq_domain_remove(port->irq_domain); - if (port->leg_domain) - irq_domain_remove(port->leg_domain); - if (port->msi_domain) - irq_domain_remove(port->msi_domain); ----------} ---------- /** * xilinx_pcie_init_irq_domain - Initialize IRQ domain * @port: PCIe port information