From: Jeeja KP Date: Thu, 29 Oct 2015 03:31:34 +0000 (+0900) Subject: ASoC: Intel: Skylake: Fix the SSP0 Fmt fixup to 24 bit X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=677165f76de2c785d4874d69be10dc21a5236bfb;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ASoC: Intel: Skylake: Fix the SSP0 Fmt fixup to 24 bit SSP0 FMT uses 24 bits so fix to the value to 24 bits Signed-off-by: Jeeja KP Signed-off-by: Vinod Koul Signed-off-by: Mark Brown --- diff --git a/sound/soc/intel/boards/skl_rt286.c b/sound/soc/intel/boards/skl_rt286.c index a73a431bd8b7..e6af48491229 100644 --- a/sound/soc/intel/boards/skl_rt286.c +++ b/sound/soc/intel/boards/skl_rt286.c @@ -112,12 +112,15 @@ static int skylake_ssp0_fixup(struct snd_soc_pcm_runtime *rtd, SNDRV_PCM_HW_PARAM_RATE); struct snd_interval *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); + struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT); /* The output is 48KHz, stereo, 16bits */ rate->min = rate->max = 48000; channels->min = channels->max = 2; - params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); + /* set SSP0 to 24 bit */ + snd_mask_none(fmt); + snd_mask_set(fmt, SNDRV_PCM_FORMAT_S24_LE); return 0; }