From: Tom Rini Date: Fri, 9 Sep 2005 20:01:47 +0000 (-0700) Subject: [PATCH] ppc32: In the boot code, don't rely on BASE_BAUD directly X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=66b375bf7d9c995fd6169191c3862071e710f456;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git [PATCH] ppc32: In the boot code, don't rely on BASE_BAUD directly Modifies serial_init to get base baud rate from the rs_table entry instead of BAUD_BASE. This patch eliminates duplication between the SERIAL_PORT_DFNS macro and BAUD_BASE. Without the patch, if a port set the baud rate in SERIAL_PORT_DFNS, but did not update BASE_BAUD, the BASE_BAUD value would still be used. Signed-off-by: Grant Likely Signed-off-by: Tom Rini Cc: Russell King Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/arch/ppc/boot/common/ns16550.c b/arch/ppc/boot/common/ns16550.c index 9017c547a6f6..26818bbb6cff 100644 --- a/arch/ppc/boot/common/ns16550.c +++ b/arch/ppc/boot/common/ns16550.c @@ -23,7 +23,7 @@ static int shift; unsigned long serial_init(int chan, void *ignored) { - unsigned long com_port; + unsigned long com_port, base_baud; unsigned char lcr, dlm; /* We need to find out which type io we're expecting. If it's @@ -43,6 +43,8 @@ unsigned long serial_init(int chan, void *ignored) /* How far apart the registers are. */ shift = rs_table[chan].iomem_reg_shift; + /* Base baud.. */ + base_baud = rs_table[chan].baud_base; /* save the LCR */ lcr = inb(com_port + (UART_LCR << shift)); @@ -62,9 +64,9 @@ unsigned long serial_init(int chan, void *ignored) else { /* Input clock. */ outb(com_port + (UART_DLL << shift), - (BASE_BAUD / SERIAL_BAUD) & 0xFF); + (base_baud / SERIAL_BAUD) & 0xFF); outb(com_port + (UART_DLM << shift), - (BASE_BAUD / SERIAL_BAUD) >> 8); + (base_baud / SERIAL_BAUD) >> 8); /* 8 data, 1 stop, no parity */ outb(com_port + (UART_LCR << shift), 0x03); /* RTS/DTR */