From: Mika Kuoppala Date: Mon, 7 Dec 2015 16:29:44 +0000 (+0200) Subject: drm/i915/skl: Disable coarse power gating up until F0 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=6686ece19f7446f0e29c77d9e0402e1d0ce10c48;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git drm/i915/skl: Disable coarse power gating up until F0 There is conflicting info between E0 and F0 steppings for this workarounds. Trust more authoritative source and be conservative and extend also for F0. This prevents numerous (>50) gpu hangs with SKL GT4e during piglit run. References: HSD: gen9lp/2134184 Cc: Sagar Arun Kamble Signed-off-by: Mika Kuoppala Reviewed-by: Sagar Arun Kamble Link: http://patchwork.freedesktop.org/patch/msgid/1449505785-20812-1-git-send-email-mika.kuoppala@intel.com Signed-off-by: Jani Nikula --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index ee05ce8bf79a..7096c0668fbb 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4717,7 +4717,7 @@ static void gen9_enable_rc6(struct drm_device *dev) */ if (IS_BXT_REVID(dev, 0, BXT_REVID_A1) || ((IS_SKL_GT3(dev) || IS_SKL_GT4(dev)) && - IS_SKL_REVID(dev, 0, SKL_REVID_E0))) + IS_SKL_REVID(dev, 0, SKL_REVID_F0))) I915_WRITE(GEN9_PG_ENABLE, 0); else I915_WRITE(GEN9_PG_ENABLE, (rc6_mask & GEN6_RC_CTL_RC6_ENABLE) ?