From: Ralf Baechle Date: Wed, 1 Nov 2006 00:22:00 +0000 (+0000) Subject: [MIPS] SMTC: Synchronize cp0 counters on bootup. X-Git-Tag: MMI-PSA29.97-13-9~45515^2~20^2~250^2~1 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=64c590b7a62ae1272fe4afd7b915de314591f35e;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git [MIPS] SMTC: Synchronize cp0 counters on bootup. Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index cc1f7474f7d7..3b78caf112f5 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -476,6 +476,7 @@ void mipsmt_prepare_cpus(void) write_vpe_c0_compare(0); /* Propagate Config7 */ write_vpe_c0_config7(read_c0_config7()); + write_vpe_c0_count(read_c0_count()); } /* enable multi-threading within VPE */ write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);