From: Daniel Vetter Date: Tue, 22 Sep 2015 09:02:18 +0000 (+0200) Subject: Merge tag 'v4.3-rc2' into topic/drm-misc X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=646db260b843d2f758559a5483174354c304acf8;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git Merge tag 'v4.3-rc2' into topic/drm-misc Backmerge Linux 4.3-rc2 because of conflicts in the dp helper code between bugfixes and new code. Just adjacent lines really. On top of that there's a silent conflict in the new fsl-dcu driver merged into 4.3 and commit 844f9111f6f54f88eb2f0fac121b82ce77193866 Author: Maarten Lankhorst Date: Wed Sep 2 10:42:40 2015 +0200 drm/atomic: Make prepare_fb/cleanup_fb only take state, v3. which Thierry Reding spotted and provided a fixup for. Signed-off-by: Daniel Vetter --- 646db260b843d2f758559a5483174354c304acf8 diff --cc drivers/gpu/drm/drm_dp_helper.c index 5a55d905b8ee,291734e87fca..9535c5b60387 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@@ -422,19 -424,90 +424,103 @@@ static u32 drm_dp_i2c_functionality(str I2C_FUNC_10BIT_ADDR; } +static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg) +{ + /* + * In case of i2c defer or short i2c ack reply to a write, + * we need to switch to WRITE_STATUS_UPDATE to drain the + * rest of the message + */ + if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { + msg->request &= DP_AUX_I2C_MOT; + msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; + } +} + + #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */ + #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */ + #define AUX_STOP_LEN 4 + #define AUX_CMD_LEN 4 + #define AUX_ADDRESS_LEN 20 + #define AUX_REPLY_PAD_LEN 4 + #define AUX_LENGTH_LEN 8 + + /* + * Calculate the duration of the AUX request/reply in usec. Gives the + * "best" case estimate, ie. successful while as short as possible. + */ + static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg) + { + int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + + AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN; + + if ((msg->request & DP_AUX_I2C_READ) == 0) + len += msg->size * 8; + + return len; + } + + static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg) + { + int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + + AUX_CMD_LEN + AUX_REPLY_PAD_LEN; + + /* + * For read we expect what was asked. For writes there will + * be 0 or 1 data bytes. Assume 0 for the "best" case. + */ + if (msg->request & DP_AUX_I2C_READ) + len += msg->size * 8; + + return len; + } + + #define I2C_START_LEN 1 + #define I2C_STOP_LEN 1 + #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */ + #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */ + + /* + * Calculate the length of the i2c transfer in usec, assuming + * the i2c bus speed is as specified. Gives the the "worst" + * case estimate, ie. successful while as long as possible. + * Doesn't account the the "MOT" bit, and instead assumes each + * message includes a START, ADDRESS and STOP. Neither does it + * account for additional random variables such as clock stretching. + */ + static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg, + int i2c_speed_khz) + { + /* AUX bitrate is 1MHz, i2c bitrate as specified */ + return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN + + msg->size * I2C_DATA_LEN + + I2C_STOP_LEN) * 1000, i2c_speed_khz); + } + + /* + * Deterine how many retries should be attempted to successfully transfer + * the specified message, based on the estimated durations of the + * i2c and AUX transfers. + */ + static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg, + int i2c_speed_khz) + { + int aux_time_us = drm_dp_aux_req_duration(msg) + + drm_dp_aux_reply_duration(msg); + int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz); + + return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL); + } + + /* + * FIXME currently assumes 10 kHz as some real world devices seem + * to require it. We should query/set the speed via DPCD if supported. + */ + static int dp_aux_i2c_speed_khz __read_mostly = 10; + module_param_unsafe(dp_aux_i2c_speed_khz, int, 0644); + MODULE_PARM_DESC(dp_aux_i2c_speed_khz, + "Assumed speed of the i2c bus in kHz, (1-400, default 10)"); + /* * Transfer a single I2C-over-AUX message and handle various error conditions, * retrying the transaction as appropriate. It is assumed that the @@@ -521,8 -595,7 +610,9 @@@ static int drm_dp_i2c_do_msg(struct drm aux->i2c_defer_count++; if (defer_i2c < 7) defer_i2c++; - usleep_range(400, 500); + usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); + drm_dp_i2c_msg_write_status_update(msg); ++ continue; default: diff --cc drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c index 82be6b86a168,82be6b86a168..d78f8df1fa75 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c @@@ -190,14 -190,14 +190,12 @@@ set_failed static void fsl_dcu_drm_plane_cleanup_fb(struct drm_plane *plane, -- struct drm_framebuffer *fb, const struct drm_plane_state *new_state) { } static int fsl_dcu_drm_plane_prepare_fb(struct drm_plane *plane, -- struct drm_framebuffer *fb, const struct drm_plane_state *new_state) { return 0; diff --cc drivers/gpu/drm/i915/intel_audio.c index 1314ebb282e4,89c1a8ce1f98..f73de0bef584 --- a/drivers/gpu/drm/i915/intel_audio.c +++ b/drivers/gpu/drm/i915/intel_audio.c @@@ -400,8 -400,11 +400,11 @@@ void intel_audio_codec_enable(struct in struct drm_connector *connector; struct drm_device *dev = encoder->dev; struct drm_i915_private *dev_priv = dev->dev_private; + struct i915_audio_component *acomp = dev_priv->audio_component; + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); + enum port port = intel_dig_port->port; - connector = drm_select_eld(encoder, mode); + connector = drm_select_eld(encoder); if (!connector) return;