From: Shawn Guo Date: Sat, 17 Jun 2017 14:21:05 +0000 (+0800) Subject: clk: zx296718: export I2S mux clocks X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=6454504c8003fd1c720bab618da8a2aedd30d367;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git clk: zx296718: export I2S mux clocks Export I2S mux clocks, so that device tree can refer to them for setting a better parent clock for I2S work clock. Signed-off-by: Shawn Guo Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/zte/clk-zx296718.c b/drivers/clk/zte/clk-zx296718.c index a10962988ba8..27f853d4c76b 100644 --- a/drivers/clk/zte/clk-zx296718.c +++ b/drivers/clk/zte/clk-zx296718.c @@ -932,10 +932,10 @@ PNAME(audio_timer_p) = { }; static struct zx_clk_mux audio_mux_clk[] = { - MUX(0, "i2s0_wclk_mux", audio_wclk_common_p, AUDIO_I2S0_CLK, 0, 1), - MUX(0, "i2s1_wclk_mux", audio_wclk_common_p, AUDIO_I2S1_CLK, 0, 1), - MUX(0, "i2s2_wclk_mux", audio_wclk_common_p, AUDIO_I2S2_CLK, 0, 1), - MUX(0, "i2s3_wclk_mux", audio_wclk_common_p, AUDIO_I2S3_CLK, 0, 1), + MUX(I2S0_WCLK_MUX, "i2s0_wclk_mux", audio_wclk_common_p, AUDIO_I2S0_CLK, 0, 1), + MUX(I2S1_WCLK_MUX, "i2s1_wclk_mux", audio_wclk_common_p, AUDIO_I2S1_CLK, 0, 1), + MUX(I2S2_WCLK_MUX, "i2s2_wclk_mux", audio_wclk_common_p, AUDIO_I2S2_CLK, 0, 1), + MUX(I2S3_WCLK_MUX, "i2s3_wclk_mux", audio_wclk_common_p, AUDIO_I2S3_CLK, 0, 1), MUX(0, "i2c0_wclk_mux", audio_wclk_common_p, AUDIO_I2C0_CLK, 0, 1), MUX(0, "spdif0_wclk_mux", audio_wclk_common_p, AUDIO_SPDIF0_CLK, 0, 1), MUX(0, "spdif1_wclk_mux", audio_wclk_common_p, AUDIO_SPDIF1_CLK, 0, 1), diff --git a/include/dt-bindings/clock/zx296718-clock.h b/include/dt-bindings/clock/zx296718-clock.h index 822d52385080..092c9751a697 100644 --- a/include/dt-bindings/clock/zx296718-clock.h +++ b/include/dt-bindings/clock/zx296718-clock.h @@ -157,7 +157,11 @@ #define AUDIO_TDM_WCLK 17 #define AUDIO_TDM_PCLK 18 #define AUDIO_TS_PCLK 19 +#define I2S0_WCLK_MUX 20 +#define I2S1_WCLK_MUX 21 +#define I2S2_WCLK_MUX 22 +#define I2S3_WCLK_MUX 23 -#define AUDIO_NR_CLKS 20 +#define AUDIO_NR_CLKS 24 #endif