From: Russell King Date: Sat, 12 May 2007 14:25:50 +0000 (+0100) Subject: [ARM] Use new get_irqnr_preamble X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=641e79129a56a4c50be1aed0fa713f440b46a440;p=GitHub%2FLineageOS%2Fandroid_kernel_samsung_universal7580.git [ARM] Use new get_irqnr_preamble Use the new get_irqnr_preamble macro to move the address of the IRQ controller outside the IRQ handling loop. Signed-off-by: Russell King --- diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S index 0cfb89b229d..038b761fdad 100644 --- a/include/asm-arm/arch-cl7500/entry-macro.S +++ b/include/asm-arm/arch-cl7500/entry-macro.S @@ -1,6 +1,14 @@ #include #include + + .equ ioc_base_high, IOC_BASE & 0xff000000 + .equ ioc_base_low, IOC_BASE & 0x00ff0000 + .macro get_irqnr_preamble, base, tmp + mov \base, #ioc_base_high @ point at IOC + .if ioc_base_low + orr \base, \base, #ioc_base_low + .endif .endm .macro arch_ret_to_user, tmp1, tmp2 diff --git a/include/asm-arm/arch-ebsa110/entry-macro.S b/include/asm-arm/arch-ebsa110/entry-macro.S index aa23c5d6c69..f242be5c49b 100644 --- a/include/asm-arm/arch-ebsa110/entry-macro.S +++ b/include/asm-arm/arch-ebsa110/entry-macro.S @@ -16,13 +16,13 @@ .endm .macro get_irqnr_preamble, base, tmp + mov \base, #IRQ_STAT .endm .macro arch_ret_to_user, tmp1, tmp2 .endm .macro get_irqnr_and_base, irqnr, stat, base, tmp - mov \base, #IRQ_STAT ldrb \stat, [\base] @ get interrupts mov \irqnr, #0 tst \stat, #15 diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S index 4203dbf1066..e63064edb73 100644 --- a/include/asm-arm/arch-ebsa285/entry-macro.S +++ b/include/asm-arm/arch-ebsa285/entry-macro.S @@ -11,24 +11,24 @@ #include #include + .equ dc21285_high, ARMCSR_BASE & 0xff000000 + .equ dc21285_low, ARMCSR_BASE & 0x00ffffff + .macro disable_fiq .endm .macro get_irqnr_preamble, base, tmp + mov \base, #dc21285_high + .if dc21285_low + orr \base, \base, #dc21285_low + .endif .endm .macro arch_ret_to_user, tmp1, tmp2 .endm - .equ dc21285_high, ARMCSR_BASE & 0xff000000 - .equ dc21285_low, ARMCSR_BASE & 0x00ffffff - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov r4, #dc21285_high - .if dc21285_low - orr r4, r4, #dc21285_low - .endif - ldr \irqstat, [r4, #0x180] @ get interrupts + ldr \irqstat, [\base, #0x180] @ get interrupts mov \irqnr, #IRQ_SDRAMPARITY tst \irqstat, #IRQ_MASK_SDRAMPARITY diff --git a/include/asm-arm/arch-realview/entry-macro.S b/include/asm-arm/arch-realview/entry-macro.S index 138838d4ad7..3b4e2076603 100644 --- a/include/asm-arm/arch-realview/entry-macro.S +++ b/include/asm-arm/arch-realview/entry-macro.S @@ -14,6 +14,7 @@ .endm .macro get_irqnr_preamble, base, tmp + ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE) .endm .macro arch_ret_to_user, tmp1, tmp2 @@ -40,7 +41,6 @@ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE) ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */ ldr \tmp, =1021 diff --git a/include/asm-arm/arch-rpc/entry-macro.S b/include/asm-arm/arch-rpc/entry-macro.S index 0cfb89b229d..038b761fdad 100644 --- a/include/asm-arm/arch-rpc/entry-macro.S +++ b/include/asm-arm/arch-rpc/entry-macro.S @@ -1,6 +1,14 @@ #include #include + + .equ ioc_base_high, IOC_BASE & 0xff000000 + .equ ioc_base_low, IOC_BASE & 0x00ff0000 + .macro get_irqnr_preamble, base, tmp + mov \base, #ioc_base_high @ point at IOC + .if ioc_base_low + orr \base, \base, #ioc_base_low + .endif .endm .macro arch_ret_to_user, tmp1, tmp2 diff --git a/include/asm-arm/arch-sa1100/entry-macro.S b/include/asm-arm/arch-sa1100/entry-macro.S index 02896762934..127db4aaf4f 100644 --- a/include/asm-arm/arch-sa1100/entry-macro.S +++ b/include/asm-arm/arch-sa1100/entry-macro.S @@ -12,16 +12,16 @@ .endm .macro get_irqnr_preamble, base, tmp + mov \base, #0xfa000000 @ ICIP = 0xfa050000 + add \base, \base, #0x00050000 .endm .macro arch_ret_to_user, tmp1, tmp2 .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov r4, #0xfa000000 @ ICIP = 0xfa050000 - add r4, r4, #0x00050000 - ldr \irqstat, [r4] @ get irqs - ldr \irqnr, [r4, #4] @ ICMR = 0xfa050004 + ldr \irqstat, [\base] @ get irqs + ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 ands \irqstat, \irqstat, \irqnr mov \irqnr, #0 beq 1001f diff --git a/include/asm-arm/arch-versatile/entry-macro.S b/include/asm-arm/arch-versatile/entry-macro.S index 0fae002637a..924d1a8fe36 100644 --- a/include/asm-arm/arch-versatile/entry-macro.S +++ b/include/asm-arm/arch-versatile/entry-macro.S @@ -14,13 +14,13 @@ .endm .macro get_irqnr_preamble, base, tmp + ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE) .endm .macro arch_ret_to_user, tmp1, tmp2 .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \base, =IO_ADDRESS(VERSATILE_VIC_BASE) ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get masked status mov \irqnr, #0 teq \irqstat, #0 diff --git a/include/asm-arm/hardware/entry-macro-iomd.S b/include/asm-arm/hardware/entry-macro-iomd.S index fbed08f298d..9bb580a5b15 100644 --- a/include/asm-arm/hardware/entry-macro-iomd.S +++ b/include/asm-arm/hardware/entry-macro-iomd.S @@ -11,8 +11,6 @@ /* IOC / IOMD based hardware */ #include - .equ ioc_base_high, IOC_BASE & 0xff000000 - .equ ioc_base_low, IOC_BASE & 0x00ff0000 .macro disable_fiq mov r12, #ioc_base_high .if ioc_base_low @@ -22,33 +20,29 @@ .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov r4, #ioc_base_high @ point at IOC - .if ioc_base_low - orr r4, r4, #ioc_base_low - .endif - ldrb \irqstat, [r4, #IOMD_IRQREQB] @ get high priority first - ldr \base, =irq_prio_h + ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first + ldr \tmp, =irq_prio_h teq \irqstat, #0 #ifdef IOMD_BASE - ldreqb \irqstat, [r4, #IOMD_DMAREQ] @ get dma - addeq \base, \base, #256 @ irq_prio_h table size + ldreqb \irqstat, [\base, #IOMD_DMAREQ] @ get dma + addeq \tmp, \tmp, #256 @ irq_prio_h table size teqeq \irqstat, #0 bne 2406f #endif - ldreqb \irqstat, [r4, #IOMD_IRQREQA] @ get low priority - addeq \base, \base, #256 @ irq_prio_d table size + ldreqb \irqstat, [\base, #IOMD_IRQREQA] @ get low priority + addeq \tmp, \tmp, #256 @ irq_prio_d table size teqeq \irqstat, #0 #ifdef IOMD_IRQREQC - ldreqb \irqstat, [r4, #IOMD_IRQREQC] - addeq \base, \base, #256 @ irq_prio_l table size + ldreqb \irqstat, [\base, #IOMD_IRQREQC] + addeq \tmp, \tmp, #256 @ irq_prio_l table size teqeq \irqstat, #0 #endif #ifdef IOMD_IRQREQD - ldreqb \irqstat, [r4, #IOMD_IRQREQD] - addeq \base, \base, #256 @ irq_prio_lc table size + ldreqb \irqstat, [\base, #IOMD_IRQREQD] + addeq \tmp, \tmp, #256 @ irq_prio_lc table size teqeq \irqstat, #0 #endif -2406: ldrneb \irqnr, [\base, \irqstat] @ get IRQ number +2406: ldrneb \irqnr, [\tmp, \irqstat] @ get IRQ number .endm /*