From: Marc Zyngier Date: Thu, 28 Nov 2013 18:24:58 +0000 (+0000) Subject: arm64: boot protocol documentation update for GICv3 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=63f8344cb4917e5219d07cfd6fcd50860bcf5360;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git arm64: boot protocol documentation update for GICv3 Linux has some requirements that must be satisfied in order to boot on a system built with a GICv3. Acked-by: Christoffer Dall Signed-off-by: Marc Zyngier --- diff --git a/Documentation/arm64/booting.txt b/Documentation/arm64/booting.txt index 37fc4f632176..da1d4bf32ac2 100644 --- a/Documentation/arm64/booting.txt +++ b/Documentation/arm64/booting.txt @@ -141,6 +141,14 @@ Before jumping into the kernel, the following conditions must be met: the kernel image will be entered must be initialised by software at a higher exception level to prevent execution in an UNKNOWN state. + For systems with a GICv3 interrupt controller: + - If EL3 is present: + ICC_SRE_EL3.Enable (bit 3) must be initialiased to 0b1. + ICC_SRE_EL3.SRE (bit 0) must be initialised to 0b1. + - If the kernel is entered at EL1: + ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1 + ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1. + The requirements described above for CPU mode, caches, MMUs, architected timers, coherency and system registers apply to all CPUs. All CPUs must enter the kernel in the same exception level.