From: Jesse Barnes Date: Mon, 19 Oct 2009 22:37:32 +0000 (+0900) Subject: drm/i915: update watermarks before enabling PLLs X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=629598da932cfa5ff398fe10bc123282a6f3049e;p=GitHub%2FLineageOS%2FG12%2Fandroid_kernel_amlogic_linux-4.9.git drm/i915: update watermarks before enabling PLLs When coming back from DPMS or turning on a display, make sure we have the watermarks set up before turning on the display plane, otherwise we may get underruns. Signed-off-by: Jesse Barnes Tested-by: Dirk Hohndel Signed-off-by: Eric Anholt --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 47d6ff058991..7eed3db5451d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1803,6 +1803,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) case DRM_MODE_DPMS_ON: case DRM_MODE_DPMS_STANDBY: case DRM_MODE_DPMS_SUSPEND: + intel_update_watermarks(dev); + /* Enable the DPLL */ temp = I915_READ(dpll_reg); if ((temp & DPLL_VCO_ENABLE) == 0) { @@ -1840,7 +1842,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) /* Give the overlay scaler a chance to enable if it's on this pipe */ //intel_crtc_dpms_video(crtc, true); TODO - intel_update_watermarks(dev); break; case DRM_MODE_DPMS_OFF: intel_update_watermarks(dev);