From: James Hogan Date: Thu, 29 Jan 2015 11:14:10 +0000 (+0000) Subject: MIPS: Malta: Implement get_c0_fdc_int() X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=602e8a345a916e91256497e13575d0690cd1565f;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git MIPS: Malta: Implement get_c0_fdc_int() Implement the weak get_c0_fdc_int() function for Malta. The Fast Debug Channel (FDC) interrupt is obtained mainly depending on whether a GIC is present. Vectored external interrupt mode isn't yet supported. Signed-off-by: James Hogan Cc: Ralf Baechle Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9143/ Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index ce02dbdedc62..7d4b86571564 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c @@ -115,6 +115,22 @@ void read_persistent_clock(struct timespec *ts) ts->tv_nsec = 0; } +int get_c0_fdc_int(void) +{ + int mips_cpu_fdc_irq; + + if (cpu_has_veic) + mips_cpu_fdc_irq = -1; + else if (gic_present) + mips_cpu_fdc_irq = gic_get_c0_fdc_int(); + else if (cp0_fdc_irq >= 0) + mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq; + else + mips_cpu_fdc_irq = -1; + + return mips_cpu_fdc_irq; +} + int get_c0_perfcount_int(void) { if (cpu_has_veic) {