From: Eric Huang Date: Tue, 15 Mar 2016 21:00:22 +0000 (-0400) Subject: drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=60123300db80b17251b4de5e98c63e288c6f7b46;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git drm/amd/powerplay: add uvd/vce dpm enabling flag to fix the performance issue for CZ Set the UVD and VCE DPM flags otherwise UVD and VCE DPM won't get enabled. Reviewed-by: Alex Deucher Signed-off-by: Eric Huang Cc: stable@vger.kernel.org --- diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c index 7fdaf8c3f7a9..8d1535d33a66 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c @@ -239,6 +239,11 @@ static int cz_initialize_dpm_defaults(struct pp_hwmgr *hwmgr) phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicUVDState); + phm_cap_set(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_UVDDPM); + phm_cap_set(hwmgr->platform_descriptor.platformCaps, + PHM_PlatformCaps_VCEDPM); + cz_hwmgr->cc6_settings.cpu_cc6_disable = false; cz_hwmgr->cc6_settings.cpu_pstate_disable = false; cz_hwmgr->cc6_settings.nb_pstate_switch_disable = false;