From: Douglas Anderson Date: Tue, 14 Jun 2016 20:21:11 +0000 (-0700) Subject: arm64: dts: rockchip: add ap_pwroff and ddrio_pwroff pins for rk3399 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=5d26ad9cfb2ebe2aba75342813e7542d5a68d644;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git arm64: dts: rockchip: add ap_pwroff and ddrio_pwroff pins for rk3399 There are two sleep related pins on rk3399: ap_pwroff and ddrio_pwroff. Let's add the definition of these two pins to rk3399's main dtsi file so that boards can use them. These two pins are similar to the global_pwroff and ddrio_pwroff pins in rk3288 and are expected to be used in the same way: boards will likely want to configure these pinctrl settings in their global pinctrl hog list. Note that on rk3288 there were two additional pins in the "sleep" section: "ddr0_retention" and "ddr1_retention". On rk3288 designs these pins appeared to actually route from rk3288 back to rk3288. Presumably on rk3399 this is simply not needed since the pins don't appear to exist there. Signed-off-by: Douglas Anderson Signed-off-by: Heiko Stuebner --- diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 74fbcce6903d..80acb382efbb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1045,6 +1045,16 @@ }; }; + sleep { + ap_pwroff: ap-pwroff { + rockchip,pins = <1 5 RK_FUNC_1 &pcfg_pull_none>; + }; + + ddrio_pwroff: ddrio-pwroff { + rockchip,pins = <0 1 RK_FUNC_1 &pcfg_pull_none>; + }; + }; + spdif { spdif_bus: spdif-bus { rockchip,pins =