From: Paul Burton Date: Tue, 15 Aug 2017 21:25:08 +0000 (-0500) Subject: PCI: xilinx: Translate INTx range to hwirqs 0-3 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=5c125683fc18fa60cb26d18b26d8d622b90c7f3e;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git PCI: xilinx: Translate INTx range to hwirqs 0-3 The pcie-xilinx driver creates an IRQ domain of size 4 for legacy PCI INTx interrupts, which at first glance seems reasonable since there are 4 possible such interrupts. Unfortunately the driver then proceeds to use the range 1-4 as the hwirq numbers for INTA-INTD, causing warnings & broken interrupts when attempting to use INTD/hwirq=4 due to it being beyond the range of the IRQ domain: WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:365 irq_domain_associate+0x170/0x220 error: hwirq 0x4 is too large for dummy Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 4.12.0-rc5-00126-g19e1b3a10aad-dirty #427 Stack : 0000000000000000 0000000000000004 0000000000000006 ffffffff8092c78a 0000000000000061 ffffffff8018bf60 0000000000000000 0000000000000000 ffffffff8088c287 ffffffff80811d18 a8000000ffc60000 ffffffff80926678 0000000000000001 0000000000000000 ffffffff80887880 ffffffff80960000 ffffffff80920000 ffffffff801e6744 ffffffff80887880 a8000000ffc4f8f8 000000000000089c ffffffff8018d260 0000000000010000 ffffffff80811d18 0000000000000000 0000000000000001 0000000000000000 0000000000000000 0000000000000000 a8000000ffc4f840 0000000000000000 ffffffff8042cf34 0000000000000000 0000000000000000 0000000000000000 0000000000040c00 0000000000000000 ffffffff8010d1c8 0000000000000000 ffffffff8042cf34 ... Call Trace: [] show_stack+0x80/0xa0 [] dump_stack+0xd4/0x110 [] __warn+0xf0/0x108 [] warn_slowpath_fmt+0x3c/0x48 [] irq_domain_associate+0x170/0x220 [] irq_create_mapping+0x88/0x118 [] irq_create_fwspec_mapping+0xb8/0x320 [] irq_create_of_mapping+0x60/0x70 [] of_irq_parse_and_map_pci+0x20/0x38 [] pci_fixup_irqs+0x60/0xe0 [] xilinx_pcie_probe+0x28c/0x478 [] platform_drv_probe+0x50/0xd0 [] driver_probe_device+0x2c4/0x3a0 [] __driver_attach+0xc4/0xd0 [] bus_for_each_dev+0x64/0xa8 [] bus_add_driver+0x1f0/0x268 [] driver_register+0x68/0x118 [] do_one_initcall+0x4c/0x178 [] kernel_init_freeable+0x204/0x2b0 [] kernel_init+0x10/0xf8 [] ret_from_kernel_thread+0x14/0x1c Fix this by making use of the new pci_irqd_intx_xlate() helper to translate the INTx 1-4 range into the 0-3 range suitable for the IRQ domain of size 4, and stop adding 1 to the hwirq number decoded from the interrupt FIFO which is already in the range 0-3. Whilst we're here we switch to using PCI_NUM_INTX rather than the magic number 4, making it clearer what the 4 means. Signed-off-by: Paul Burton Signed-off-by: Bjorn Helgaas Cc: Bharat Kumar Gogada Cc: Michal Simek Cc: Ravikiran Gummaluri --- diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c index f63fa5e0278c..9a8d5ad1dd70 100644 --- a/drivers/pci/host/pcie-xilinx.c +++ b/drivers/pci/host/pcie-xilinx.c @@ -369,6 +369,7 @@ static int xilinx_pcie_intx_map(struct irq_domain *domain, unsigned int irq, /* INTx IRQ Domain operations */ static const struct irq_domain_ops intx_domain_ops = { .map = xilinx_pcie_intx_map, + .xlate = pci_irqd_intx_xlate, }; /* PCIe HW Functions */ @@ -440,8 +441,8 @@ static irqreturn_t xilinx_pcie_intr_handler(int irq, void *data) XILINX_PCIE_REG_RPIFR1); /* Handle INTx Interrupt */ - val = ((val & XILINX_PCIE_RPIFR1_INTR_MASK) >> - XILINX_PCIE_RPIFR1_INTR_SHIFT) + 1; + val = (val & XILINX_PCIE_RPIFR1_INTR_MASK) >> + XILINX_PCIE_RPIFR1_INTR_SHIFT; generic_handle_irq(irq_find_mapping(port->leg_domain, val)); } @@ -524,7 +525,7 @@ static int xilinx_pcie_init_irq_domain(struct xilinx_pcie_port *port) return -ENODEV; } - port->leg_domain = irq_domain_add_linear(pcie_intc_node, 4, + port->leg_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX, &intx_domain_ops, port); if (!port->leg_domain) {