From: Alex Deucher Date: Fri, 20 May 2011 16:35:22 +0000 (-0400) Subject: drm/radeon/kms: properly set num banks for fusion asics X-Git-Tag: MMI-PSA29.97-13-9~19271^2~16 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=5bfa487955016dc99f83195921f74287743f0033;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git drm/radeon/kms: properly set num banks for fusion asics Needed by userspace for 2D tiled buffer alignment Signed-off-by: Alex Deucher Signed-off-by: Dave Airlie --- diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 864e853cc0ec..34cd5a878088 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c @@ -1933,8 +1933,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev) rdev->config.evergreen.tile_config |= (3 << 0); break; } - rdev->config.evergreen.tile_config |= - ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; + /* num banks is 8 on all fusion asics */ + if (rdev->flags & RADEON_IS_IGP) + rdev->config.evergreen.tile_config |= 8 << 4; + else + rdev->config.evergreen.tile_config |= + ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; rdev->config.evergreen.tile_config |= ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; rdev->config.evergreen.tile_config |=