From: Maxime Chevallier Date: Wed, 17 Jan 2018 16:15:25 +0000 (+0100) Subject: spi: a3700: Clear DATA_OUT when performing a read X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=58bc0fd8434d510c5e86f6739c9856b695730504;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git spi: a3700: Clear DATA_OUT when performing a read [ Upstream commit 44a5f423e70374e5b42cecd85e78f2d79334e0f2 ] When performing a read using FIFO mode, the spi controller shifts out the last 2 bytes that were written in a previous transfer on MOSI. This undocumented behaviour can cause devices to misinterpret the transfer, so we explicitly clear the WFIFO before each read. This behaviour was noticed on EspressoBin. Signed-off-by: Maxime Chevallier Signed-off-by: Mark Brown Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/spi/spi-armada-3700.c b/drivers/spi/spi-armada-3700.c index fe3fa1e8517a..4903f15177cf 100644 --- a/drivers/spi/spi-armada-3700.c +++ b/drivers/spi/spi-armada-3700.c @@ -624,6 +624,11 @@ static int a3700_spi_transfer_one(struct spi_master *master, a3700_spi_header_set(a3700_spi); if (xfer->rx_buf) { + /* Clear WFIFO, since it's last 2 bytes are shifted out during + * a read operation + */ + spireg_write(a3700_spi, A3700_SPI_DATA_OUT_REG, 0); + /* Set read data length */ spireg_write(a3700_spi, A3700_SPI_IF_DIN_CNT_REG, a3700_spi->buf_len);