From: Chun-Hao Lin <hau@realtek.com>
Date: Thu, 24 Dec 2015 13:15:27 +0000 (+0800)
Subject: r8169:Update the way of reading RTL8168H PHY register "rg_saw_cnt"
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=584933334b7a81f09637f28cbee759a1e24428db;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

r8169:Update the way of reading RTL8168H PHY register "rg_saw_cnt"

The vlaue of RTL8168H PHY register "rg_saw_cnt" only valid from bit0 to bit13.
When read this register, add bitwise-anding its value with 0x3fff.

Signed-off-by: Chunhao Lin <hau@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 11cc32b1755e..58365bcf2370 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -6136,7 +6136,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
 	rtl_pcie_state_l2l3_enable(tp, false);
 
 	rtl_writephy(tp, 0x1f, 0x0c42);
-	rg_saw_cnt = rtl_readphy(tp, 0x13);
+	rg_saw_cnt = (rtl_readphy(tp, 0x13) & 0x3fff);
 	rtl_writephy(tp, 0x1f, 0x0000);
 	if (rg_saw_cnt > 0) {
 		u16 sw_cnt_1ms_ini;