From: Hyeonseong Gil <hs.gil@samsung.com>
Date: Fri, 7 Apr 2017 02:18:28 +0000 (+0900)
Subject: [COMMON] thermal: samsung: Parse dyn_coeff from ECT
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=57e9c1e8d3ac883c0606d7956b9c28e8a86d2c66;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

[COMMON] thermal: samsung: Parse dyn_coeff from ECT

Change-Id: I92d7a36ff94c95c189e188145a3846bd6e63bcd0
Signed-off-by: Hyeonseong Gil <hs.gil@samsung.com>
---

diff --git a/drivers/thermal/cpu_cooling.c b/drivers/thermal/cpu_cooling.c
index 62edf361912e..12b4be2c10be 100644
--- a/drivers/thermal/cpu_cooling.c
+++ b/drivers/thermal/cpu_cooling.c
@@ -1123,6 +1123,9 @@ exynos_cpufreq_cooling_register(const struct cpumask *clip_cpus)
 {
 	struct device *dev;
 	struct device_node *np;
+	struct thermal_zone_device *tz;
+	void *gen_block;
+	struct ect_gen_param_table *pwr_coeff;
 	u32 capacitance = 0;
 
 	dev = get_cpu_device(cpumask_first(clip_cpus));
@@ -1135,6 +1138,25 @@ exynos_cpufreq_cooling_register(const struct cpumask *clip_cpus)
 	if (!np)
 		return ERR_PTR(-EINVAL);
 
+	tz = thermal_zone_get_zone_by_cool_np(np);
+
+	if (tz) {
+		gen_block = ect_get_block("GEN");
+		if (gen_block == NULL) {
+			pr_err("%s: Failed to get gen block from ECT\n", __func__);
+			goto regist;
+		}
+		pwr_coeff = ect_gen_param_get_table(gen_block, "DTM_PWR_Coeff");
+		if (pwr_coeff == NULL) {
+			pr_err("%s: Failed to get power coeff from ECT\n", __func__);
+			goto regist;
+		}
+		capacitance = pwr_coeff->parameter[tz->id];
+	} else {
+		pr_err("%s: could not find thermal zone\n", __func__);
+	}
+
+regist:
 	return __cpufreq_cooling_register(np, clip_cpus, capacitance,
 				NULL);
 }
diff --git a/drivers/thermal/gpu_cooling.c b/drivers/thermal/gpu_cooling.c
index e54cf71865ab..25b07fe420a2 100644
--- a/drivers/thermal/gpu_cooling.c
+++ b/drivers/thermal/gpu_cooling.c
@@ -1079,6 +1079,10 @@ static int __init exynos_gpu_cooling_init(void)
 {
 	struct device_node *np;
 	struct thermal_cooling_device *dev;
+	struct thermal_zone_device *tz;
+	void *gen_block;
+	struct ect_gen_param_table *pwr_coeff;
+	u32 capacitance = 0;
 	int ret = 0;
 
 	ret = gpu_cooling_table_init();
@@ -1095,7 +1099,26 @@ static int __init exynos_gpu_cooling_init(void)
 		return -EINVAL;
 	}
 
-	dev = __gpufreq_cooling_register(np, NULL, 0, NULL);
+	tz = thermal_zone_get_zone_by_cool_np(np);
+
+	if (tz) {
+		gen_block = ect_get_block("GEN");
+		if (gen_block == NULL) {
+			pr_err("%s: Failed to get gen block from ECT\n", __func__);
+			goto regist;
+		}
+		pwr_coeff = ect_gen_param_get_table(gen_block, "DTM_PWR_Coeff");
+		if (pwr_coeff == NULL) {
+			pr_err("%s: Failed to get power coeff from ECT\n", __func__);
+			goto regist;
+		}
+		capacitance = pwr_coeff->parameter[tz->id];
+	} else {
+		pr_err("%s: could not find thermal zone\n", __func__);
+	}
+
+regist:
+	dev = __gpufreq_cooling_register(np, NULL, capacitance, NULL);
 
 	if (IS_ERR(dev)) {
 		pr_err("Fail to register gpufreq cooling\n");