From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Thu, 19 Jan 2017 16:39:45 +0000 (+0200)
Subject: platform/x86: intel_mid_powerbtn: Acknowledge interrupts
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=553e9c1861b7f91492eb6e209adff81507624fa6;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

platform/x86: intel_mid_powerbtn: Acknowledge interrupts

Some platforms require interrupt to be acknowledged by clearing
MSIC_PWRBTNM bit in interrupt level 1 mask register.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---

diff --git a/drivers/platform/x86/intel_mid_powerbtn.c b/drivers/platform/x86/intel_mid_powerbtn.c
index 596ac9f3e89d..ac02a0b8bef3 100644
--- a/drivers/platform/x86/intel_mid_powerbtn.c
+++ b/drivers/platform/x86/intel_mid_powerbtn.c
@@ -94,6 +94,7 @@ static irqreturn_t mid_pb_isr(int irq, void *dev_id)
 		input_sync(input);
 	}
 
+	ddata->ack(ddata);
 	return IRQ_HANDLED;
 }