From: Mike Rapoport Date: Sun, 17 Jan 2016 18:04:24 +0000 (+0200) Subject: staging: sm750fb: change definition of MISC_CTRL multi-bit fields X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=5538d5c8bd1681dbf6e5684de24acffa69e2bf9f;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git staging: sm750fb: change definition of MISC_CTRL multi-bit fields Use more straight-forward definitions for multi-bit fields of MISC_CTRL register and use open-coded implementation for register manipulations. Signed-off-by: Mike Rapoport Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/sm750fb/ddk750_chip.c b/drivers/staging/sm750fb/ddk750_chip.c index 08b490578b06..36c2e50ef661 100644 --- a/drivers/staging/sm750fb/ddk750_chip.c +++ b/drivers/staging/sm750fb/ddk750_chip.c @@ -178,7 +178,7 @@ unsigned int ddk750_getVMSize(void) POKE32(MODE0_GATE, reg); /* get frame buffer size from GPIO */ - reg = FIELD_GET(PEEK32(MISC_CTRL), MISC_CTRL, LOCALMEM_SIZE); + reg = PEEK32(MISC_CTRL) & MISC_CTRL_LOCALMEM_SIZE_MASK; switch (reg) { case MISC_CTRL_LOCALMEM_SIZE_8M: data = SZ_8M; break; /* 8 Mega byte */ diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h index 6df50769746e..72eaf1920bd0 100644 --- a/drivers/staging/sm750fb/ddk750_reg.h +++ b/drivers/staging/sm750fb/ddk750_reg.h @@ -43,24 +43,24 @@ #define MISC_CTRL 0x000004 #define MISC_CTRL_DRAM_RERESH_COUNT BIT(27) -#define MISC_CTRL_DRAM_REFRESH_TIME 26:25 -#define MISC_CTRL_DRAM_REFRESH_TIME_8 0 -#define MISC_CTRL_DRAM_REFRESH_TIME_16 1 -#define MISC_CTRL_DRAM_REFRESH_TIME_32 2 -#define MISC_CTRL_DRAM_REFRESH_TIME_64 3 +#define MISC_CTRL_DRAM_REFRESH_TIME_MASK (0x3 << 25) +#define MISC_CTRL_DRAM_REFRESH_TIME_8 (0x0 << 25) +#define MISC_CTRL_DRAM_REFRESH_TIME_16 (0x1 << 25) +#define MISC_CTRL_DRAM_REFRESH_TIME_32 (0x2 << 25) +#define MISC_CTRL_DRAM_REFRESH_TIME_64 (0x3 << 25) #define MISC_CTRL_INT_OUTPUT_INVERT BIT(24) #define MISC_CTRL_PLL_CLK_COUNT BIT(23) #define MISC_CTRL_DAC_POWER_OFF BIT(20) #define MISC_CTRL_CLK_SELECT_TESTCLK BIT(16) -#define MISC_CTRL_DRAM_COLUMN_SIZE 15:14 -#define MISC_CTRL_DRAM_COLUMN_SIZE_256 0 -#define MISC_CTRL_DRAM_COLUMN_SIZE_512 1 -#define MISC_CTRL_DRAM_COLUMN_SIZE_1024 2 -#define MISC_CTRL_LOCALMEM_SIZE 13:12 -#define MISC_CTRL_LOCALMEM_SIZE_8M 3 -#define MISC_CTRL_LOCALMEM_SIZE_16M 0 -#define MISC_CTRL_LOCALMEM_SIZE_32M 1 -#define MISC_CTRL_LOCALMEM_SIZE_64M 2 +#define MISC_CTRL_DRAM_COLUMN_SIZE_MASK (0x3 << 14) +#define MISC_CTRL_DRAM_COLUMN_SIZE_256 (0x0 << 14) +#define MISC_CTRL_DRAM_COLUMN_SIZE_512 (0x1 << 14) +#define MISC_CTRL_DRAM_COLUMN_SIZE_1024 (0x2 << 14) +#define MISC_CTRL_LOCALMEM_SIZE_MASK (0x3 << 12) +#define MISC_CTRL_LOCALMEM_SIZE_8M (0x3 << 12) +#define MISC_CTRL_LOCALMEM_SIZE_16M (0x0 << 12) +#define MISC_CTRL_LOCALMEM_SIZE_32M (0x1 << 12) +#define MISC_CTRL_LOCALMEM_SIZE_64M (0x2 << 12) #define MISC_CTRL_DRAM_TWTR BIT(11) #define MISC_CTRL_DRAM_TWR BIT(10) #define MISC_CTRL_DRAM_TRP BIT(9)