From: Gaurav K Singh <gaurav.k.singh@intel.com>
Date: Thu, 4 Dec 2014 05:28:47 +0000 (+0530)
Subject: drm/i915: New functions added for enabling & disabling MIPI Port Ctrl reg
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=5505a244901f28e21d7267246511a1ca2ce79bcc;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

drm/i915: New functions added for enabling & disabling MIPI Port Ctrl reg

This patch is in preparation for the DSI dual link
port enable and disable related changes.

Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Shobhit Kumar <shobhit.kumar@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 259cb4ab2067..693736b88080 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -102,6 +102,36 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder,
 	return true;
 }
 
+static void intel_dsi_port_enable(struct intel_encoder *encoder)
+{
+	struct drm_device *dev = encoder->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
+	u32 temp;
+
+	/* assert ip_tg_enable signal */
+	temp = I915_READ(MIPI_PORT_CTRL(port)) & ~LANE_CONFIGURATION_MASK;
+	temp = temp | intel_dsi->port_bits;
+	I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);
+	POSTING_READ(MIPI_PORT_CTRL(port));
+}
+
+static void intel_dsi_port_disable(struct intel_encoder *encoder)
+{
+	struct drm_device *dev = encoder->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
+	enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
+	u32 temp;
+
+	/* de-assert ip_tg_enable signal */
+	temp = I915_READ(MIPI_PORT_CTRL(port));
+	I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
+	POSTING_READ(MIPI_PORT_CTRL(port));
+}
+
 static void intel_dsi_device_ready(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
@@ -141,7 +171,6 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
 	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
 	enum port port = intel_dsi_pipe_to_port(intel_crtc->pipe);
-	u32 temp;
 
 	DRM_DEBUG_KMS("\n");
 
@@ -157,11 +186,7 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
 
 		wait_for_dsi_fifo_empty(intel_dsi);
 
-		/* assert ip_tg_enable signal */
-		temp = I915_READ(MIPI_PORT_CTRL(port)) & ~LANE_CONFIGURATION_MASK;
-		temp = temp | intel_dsi->port_bits;
-		I915_WRITE(MIPI_PORT_CTRL(port), temp | DPI_ENABLE);
-		POSTING_READ(MIPI_PORT_CTRL(port));
+		intel_dsi_port_enable(encoder);
 	}
 }
 
@@ -245,11 +270,7 @@ static void intel_dsi_disable(struct intel_encoder *encoder)
 	if (is_vid_mode(intel_dsi)) {
 		wait_for_dsi_fifo_empty(intel_dsi);
 
-		/* de-assert ip_tg_enable signal */
-		temp = I915_READ(MIPI_PORT_CTRL(port));
-		I915_WRITE(MIPI_PORT_CTRL(port), temp & ~DPI_ENABLE);
-		POSTING_READ(MIPI_PORT_CTRL(port));
-
+		intel_dsi_port_disable(encoder);
 		msleep(2);
 	}