From: Thomas Gleixner Date: Tue, 28 Aug 2007 09:03:01 +0000 (+0000) Subject: [MIPS] cleanup struct irqaction initializers X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4e45171c4e31578157189ca22cfb7b2bcc5f69f2;p=GitHub%2FLineageOS%2Fandroid_kernel_samsung_universal7580.git [MIPS] cleanup struct irqaction initializers Signed-off-by: Thomas Gleixner CC: Ralf Baechle Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/cobalt/irq.c b/arch/mips/cobalt/irq.c index 950ad1e8be4..48763cd10ea 100644 --- a/arch/mips/cobalt/irq.c +++ b/arch/mips/cobalt/irq.c @@ -92,7 +92,9 @@ asmlinkage void plat_irq_dispatch(void) } static struct irqaction irq_via = { - no_action, 0, { { 0, } }, "cascade", NULL, NULL + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade" }; void __init arch_init_irq(void) diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index d9efe692e55..3a47e8ce119 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c @@ -104,7 +104,9 @@ static irqreturn_t jmr3927_ioc_interrupt(int irq, void *dev_id) } static struct irqaction ioc_action = { - jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, + .handler = jmr3927_ioc_interrupt, + .mask = CPU_MASK_NONE, + .name = "IOC", }; static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) @@ -116,7 +118,9 @@ static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } static struct irqaction pcierr_action = { - jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, + .handler = jmr3927_pcierr_interrupt, + .mask = CPU_MASK_NONE, + .name = "PCI error", }; static void __init jmr3927_irq_init(void); diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c index 4f4359bfd18..60021647cac 100644 --- a/arch/mips/kernel/i8259.c +++ b/arch/mips/kernel/i8259.c @@ -303,7 +303,9 @@ void init_8259A(int auto_eoi) * IRQ2 is cascade interrupt to second interrupt controller */ static struct irqaction irq2 = { - no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL + .handler = no_action, + .mask = CPU_MASK_NONE, + .name = "cascade", }; static struct resource pic1_io_resource = { diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index fb9da9acf53..5bad1b744d0 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -117,10 +117,18 @@ static void inline flush_mace_bus(void) extern irqreturn_t crime_memerr_intr(int irq, void *dev_id); extern irqreturn_t crime_cpuerr_intr(int irq, void *dev_id); -struct irqaction memerr_irq = { crime_memerr_intr, IRQF_DISABLED, - CPU_MASK_NONE, "CRIME memory error", NULL, NULL }; -struct irqaction cpuerr_irq = { crime_cpuerr_intr, IRQF_DISABLED, - CPU_MASK_NONE, "CRIME CPU error", NULL, NULL }; +struct irqaction memerr_irq = { + .handler = crime_memerr_intr, + .flags = IRQF_DISABLED, + .mask = CPU_MASK_NONE, + .name = "CRIME memory error", +}; +struct irqaction cpuerr_irq = { + .handler = crime_cpuerr_intr, + .flags = IRQF_DISABLED, + .mask = CPU_MASK_NONE, + .name = "CRIME CPU error", +}; /* * For interrupts wired from a single device to the CPU. Only the clock diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c index 9607ad5e734..55123564881 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c @@ -243,10 +243,12 @@ int toshiba_rbtx4927_irq_nested(int sw_irq) return (sw_irq); } -//#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL } -#define TOSHIBA_RBTX4927_PIC_ACTION(s) { no_action, IRQF_SHARED, CPU_MASK_NONE, s, NULL, NULL } -static struct irqaction toshiba_rbtx4927_irq_ioc_action = -TOSHIBA_RBTX4927_PIC_ACTION(TOSHIBA_RBTX4927_IOC_NAME); +static struct irqaction toshiba_rbtx4927_irq_ioc_action = { + .handler = no_action, + .flags = IRQF_SHARED, + .mask = CPU_MASK_NONE, + .name = TOSHIBA_RBTX4927_IOC_NAME +}; /**********************************************************************************/