From: David Daney Date: Wed, 13 May 2009 22:59:56 +0000 (-0700) Subject: MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4bb1a1089e321d685967032497f4363081eab3a9;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove it to mach-cavium-octeon/cpu-feature-overrides.h Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h index bb291f41b6a3..3d830756b13a 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h @@ -53,6 +53,7 @@ #define cpu_has_userlocal 0 #define cpu_has_vint 0 #define cpu_has_veic 0 +#define cpu_hwrena_impl_bits 0xc0000000 #define ARCH_HAS_READ_CURRENT_TIMER 1 #define ARCH_HAS_IRQ_PER_CPU 1 #define ARCH_HAS_SPINLOCK_PREFETCH 1 diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index f54871797ab9..08f1edf355e8 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1510,10 +1510,6 @@ void __cpuinit per_cpu_trap_init(void) write_c0_hwrena(enable); } -#ifdef CONFIG_CPU_CAVIUM_OCTEON - write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */ -#endif - #ifdef CONFIG_MIPS_MT_SMTC if (!secondaryTC) { #endif /* CONFIG_MIPS_MT_SMTC */