From: Sutharsan Ramamoorthy Date: Wed, 2 Feb 2011 06:45:04 +0000 (-0800) Subject: Staging: Westbridge: added ioremap_nocache instead of phys_to_virt X-Git-Tag: MMI-PSA29.97-13-9~20521^2~674 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4b906e58a1f0a29ce1da4ed832cc6f17e5889772;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git Staging: Westbridge: added ioremap_nocache instead of phys_to_virt This patch removes phys_to_virt() and adds ioremap_nocache() for memory mapping the GPMC registers. Signed-off-by: Sutharsan Ramamoorthy Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c index ad0c61db9937..ea9b733c3926 100644 --- a/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c +++ b/drivers/staging/westbridge/astoria/arch/arm/mach-omap2/cyashalomap_kernel.c @@ -347,11 +347,8 @@ static int cy_as_hal_gpmc_init(void) u32 tmp32; int err; struct gpmc_timings timings; - /* - * get GPMC i/o registers base(already been i/o mapped - * in kernel, no need for separate i/o remap) - */ - gpmc_base = phys_to_virt(OMAP34XX_GPMC_BASE); + + gpmc_base = (u32)ioremap_nocache(OMAP34XX_GPMC_BASE, BLKSZ_4K); DBGPRN(KERN_INFO "kernel has gpmc_base=%x , val@ the base=%x", gpmc_base, __raw_readl(gpmc_base) );