From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Wed, 27 Jul 2011 00:09:31 +0000 (-0700)
Subject: Merge branch 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux... 
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4b30b6f23a1a59cda29cc12566eb4f32a22a8069;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

Merge branch 'next/soc' of git://git./linux/kernel/git/arm/linux-arm-soc

* 'next/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc:
  MAINTAINERS: add maintainer of CSR SiRFprimaII machine
  ARM: CSR: initializing L2 cache
  ARM: CSR: mapping early DEBUG_LL uart
  ARM: CSR: Adding CSR SiRFprimaII board support
  OMAP4: clocks: Update the clock tree with 4460 clock nodes
  OMAP4: PRCM: OMAP4460 specific PRM and CM register bitshifts
  OMAP4: ID: add omap_has_feature for max freq supported
  OMAP: ID: introduce chip detection for OMAP4460
  ARM: Xilinx: merge board file into main platform code
  ARM: Xilinx: Adding Xilinx board support

Fix up conflicts in arch/arm/mach-omap2/cm-regbits-44xx.h
---

4b30b6f23a1a59cda29cc12566eb4f32a22a8069
diff --cc arch/arm/mach-omap2/cm-regbits-44xx.h
index 0e77945d26ec,28e20d3a9f77..65597a745638
--- a/arch/arm/mach-omap2/cm-regbits-44xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-44xx.h
@@@ -555,24 -588,37 +571,36 @@@
  #define OMAP4430_D2D_STATDEP_SHIFT				18
  #define OMAP4430_D2D_STATDEP_MASK				(1 << 18)
  
+ /* Used by CM_CLKSEL_DPLL_MPU */
+ #define OMAP4460_DCC_COUNT_MAX_SHIFT				24
+ #define OMAP4460_DCC_COUNT_MAX_MASK				(0xff << 24)
+ 
+ /* Used by CM_CLKSEL_DPLL_MPU */
+ #define OMAP4460_DCC_EN_SHIFT					22
+ #define OMAP4460_DCC_EN_MASK					(1 << 22)
+ 
  /*
   * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE,
 - * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY,
 - * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU,
 - * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO,
 - * CM_SSC_DELTAMSTEP_DPLL_USB
 + * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA,
 + * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER,
 + * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB
   */
  #define OMAP4430_DELTAMSTEP_SHIFT				0
  #define OMAP4430_DELTAMSTEP_MASK				(0xfffff << 0)
  
+ /* Renamed from DELTAMSTEP Used by CM_SSC_DELTAMSTEP_DPLL_USB */
+ #define OMAP4460_DELTAMSTEP_0_20_SHIFT				0
+ #define OMAP4460_DELTAMSTEP_0_20_MASK				(0x1fffff << 0)
+ 
 -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
 -#define OMAP4430_DLL_OVERRIDE_SHIFT				2
 -#define OMAP4430_DLL_OVERRIDE_MASK				(1 << 2)
 +/* Used by CM_DLL_CTRL */
 +#define OMAP4430_DLL_OVERRIDE_SHIFT				0
 +#define OMAP4430_DLL_OVERRIDE_MASK				(1 << 0)
  
 -/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */
 -#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT				0
 -#define OMAP4430_DLL_OVERRIDE_0_0_MASK				(1 << 0)
 +/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */
 +#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT				2
 +#define OMAP4430_DLL_OVERRIDE_2_2_MASK				(1 << 2)
  
 -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */
 +/* Used by CM_SHADOW_FREQ_CONFIG1 */
  #define OMAP4430_DLL_RESET_SHIFT				3
  #define OMAP4430_DLL_RESET_MASK					(1 << 3)