From: Pavel Fedin Date: Thu, 8 Oct 2015 07:24:25 +0000 (+0300) Subject: PCI: of: Add 64-bit address recognition without LPAE support X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4af971064977b00a437c1ed8ead8876db4e3b58a;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git PCI: of: Add 64-bit address recognition without LPAE support If non-LPAE kernel is booted up on a machine with 64-bit PCI resources, PCI controller probe fails with: PCI host bridge /pcie@10000000 ranges: IO 0x3eff0000..0x3effffff -> 0x00000000 MEM 0x10000000..0x3efeffff -> 0x10000000 MEM 0x8000000000..0xffffffffff -> 0x8000000000 pci-host-generic 3f000000.pcie: resource collision: [mem 0x00000000-0xffffffff] conflicts with /pl011@9000000 [mem 0x09000000-0x09000fff] pci-host-generic: probe of 3f000000.pcie failed with error -16 This happens because res->start assignment in of_pci_range_to_resource() truncates the upper part of the address, because res->start is of phys_addr_t type, which is 32-bit on non-LPAE kernels. This patch adds explicit recognition of 64-bit resources, preventing from potential problems when e. g. 0x8000001234 would be converted to 0x00001234. Signed-off-by: Pavel Fedin Signed-off-by: Rob Herring --- diff --git a/drivers/of/address.c b/drivers/of/address.c index 384574c3987c..cd53fe4a0c86 100644 --- a/drivers/of/address.c +++ b/drivers/of/address.c @@ -330,6 +330,12 @@ int of_pci_range_to_resource(struct of_pci_range *range, } res->start = port; } else { + if ((sizeof(resource_size_t) < 8) && + upper_32_bits(range->cpu_addr)) { + err = -EINVAL; + goto invalid_range; + } + res->start = range->cpu_addr; } res->end = res->start + range->size - 1;