From: Stratos Karafotis <stratosk@semaphore.gr>
Date: Fri, 18 Jul 2014 15:37:24 +0000 (-0700)
Subject: cpufreq: intel_pstate: Disable interrupts during MSRs reading
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4ab60c3f32c721e46217e762bcd3e55a8f659c04;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

cpufreq: intel_pstate: Disable interrupts during MSRs reading

According to Intel 64 and IA-32 Architectures SDM, Volume 3,
Chapter 14.2, "Software needs to exercise care to avoid delays
between the two RDMSRs (for example interrupts)".

So, disable interrupts during reading MSRs IA32_APERF and IA32_MPERF.
This should increase the accuracy of the calculations.

Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 9d75bd6faf65..ff3c5624972c 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -577,9 +577,12 @@ static inline void intel_pstate_calc_busy(struct cpudata *cpu)
 static inline void intel_pstate_sample(struct cpudata *cpu)
 {
 	u64 aperf, mperf;
+	unsigned long flags;
 
+	local_irq_save(flags);
 	rdmsrl(MSR_IA32_APERF, aperf);
 	rdmsrl(MSR_IA32_MPERF, mperf);
+	local_irq_restore(flags);
 
 	aperf = aperf >> FRAC_BITS;
 	mperf = mperf >> FRAC_BITS;