From: Chuanxiao Dong <chuanxiao.dong@intel.com>
Date: Tue, 21 Mar 2017 01:32:19 +0000 (+0800)
Subject: drm/i915/gvt: fix wrong offset when loading RCS mocs
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4a53148868493bd5e0b18a9814aaa20bf74e3b26;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

drm/i915/gvt: fix wrong offset when loading RCS mocs

Fix the wrong offset of the RCS specific mocs

Fixes: 178657139307 ("drm/i915/gvt: vGPU context switch")

Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
---

diff --git a/drivers/gpu/drm/i915/gvt/render.c b/drivers/gpu/drm/i915/gvt/render.c
index 95ee091ce085..0beb83563b08 100644
--- a/drivers/gpu/drm/i915/gvt/render.c
+++ b/drivers/gpu/drm/i915/gvt/render.c
@@ -207,7 +207,7 @@ static void load_mocs(struct intel_vgpu *vgpu, int ring_id)
 		l3_offset.reg = 0xb020;
 		for (i = 0; i < 32; i++) {
 			gen9_render_mocs_L3[i] = I915_READ(l3_offset);
-			I915_WRITE(l3_offset, vgpu_vreg(vgpu, offset));
+			I915_WRITE(l3_offset, vgpu_vreg(vgpu, l3_offset));
 			POSTING_READ(l3_offset);
 			l3_offset.reg += 4;
 		}