From: Linus Walleij <linus.walleij@linaro.org>
Date: Mon, 22 Aug 2016 09:16:57 +0000 (+0200)
Subject: ARM: dts: add the Integrator/AP baseboard clocks
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=49eb1efadc47f49b0f43a4725f116fa61aba206b;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

ARM: dts: add the Integrator/AP baseboard clocks

The two clocks present on the Integrator/AP baseboard and
accessible through its system controller is the PCIv3 bridge
clock and the PCI bus clock. Define the proper device tree
nodes for these.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---

diff --git a/arch/arm/boot/dts/integratorap.dts b/arch/arm/boot/dts/integratorap.dts
index 33b253d5e244..16266722ce7c 100644
--- a/arch/arm/boot/dts/integratorap.dts
+++ b/arch/arm/boot/dts/integratorap.dts
@@ -48,6 +48,27 @@
 		interrupt-parent = <&pic>;
 		/* These are the logical module IRQs */
 		interrupts = <9>, <10>, <11>, <12>;
+
+		/*
+		 * SYSCLK clocks PCIv3 bridge, system controller and the
+		 * logic modules.
+		 */
+		sysclk: apsys@24M {
+			compatible = "arm,syscon-icst525-integratorap-sys";
+			#clock-cells = <0>;
+			lock-offset = <0x1c>;
+			vco-offset = <0x04>;
+			clocks = <&xtal24mhz>;
+		};
+
+		/* One-bit control for the PCI bus clock (33 or 25 MHz) */
+		pciclk: pciclk@24M {
+			compatible = "arm,syscon-icst525-integratorap-pci";
+			#clock-cells = <0>;
+			lock-offset = <0x1c>;
+			vco-offset = <0x04>;
+			clocks = <&xtal24mhz>;
+		};
 	};
 
 	timer0: timer@13000000 {