From: Ian Munsie Date: Wed, 13 Jul 2016 21:17:02 +0000 (+1000) Subject: cxl: Enable bus mastering for devices using CAPP DMA mode X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=48b3adf33459c1c42766d9c2068a592216fe7812;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git cxl: Enable bus mastering for devices using CAPP DMA mode Devices that use CAPP DMA mode (such as the Mellanox CX4) require bus master to be enabled in order for the CAPI traffic to flow. This should be harmless to enable for other cxl devices, so unconditionally enable it in the adapter init flow. Signed-off-by: Ian Munsie Reviewed-by: Andrew Donnellan Reviewed-by: Frederic Barrat Signed-off-by: Michael Ellerman --- diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c index 6ac6b05f41a4..deef9c75e73a 100644 --- a/drivers/misc/cxl/pci.c +++ b/drivers/misc/cxl/pci.c @@ -1264,6 +1264,9 @@ static int cxl_configure_adapter(struct cxl *adapter, struct pci_dev *dev) if ((rc = adapter->native->sl_ops->adapter_regs_init(adapter, dev))) goto err; + /* Required for devices using CAPP DMA mode, harmless for others */ + pci_set_master(dev); + if ((rc = pnv_phb_to_cxl_mode(dev, adapter->native->sl_ops->capi_mode))) goto err;