From: Zhenyu Wang <zhenyu.z.wang@intel.com>
Date: Tue, 11 Sep 2007 22:23:58 +0000 (-0700)
Subject: intel_agp: fix GTT map size on G33
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4740622c5c805d88c63a50747a2d05537dd233cf;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git

intel_agp: fix GTT map size on G33

G33 has 1MB GTT table range.  Fix GTT mapping in case like 512MB aperture
size.

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Acked-by: Dave Airlie <airlied@linux.ie>
Cc: Dave Jones <davej@codemonkey.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---

diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 581f9222a9d1..7c69bf259caa 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -919,6 +919,7 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
 	struct aper_size_info_fixed *size;
 	int num_entries;
 	u32 temp, temp2;
+	int gtt_map_size = 256 * 1024;
 
 	size = agp_bridge->current_size;
 	page_order = size->page_order;
@@ -928,7 +929,9 @@ static int intel_i915_create_gatt_table(struct agp_bridge_data *bridge)
 	pci_read_config_dword(intel_private.pcidev, I915_MMADDR, &temp);
 	pci_read_config_dword(intel_private.pcidev, I915_PTEADDR,&temp2);
 
-	intel_private.gtt = ioremap(temp2, 256 * 1024);
+	if (IS_G33)
+	    gtt_map_size = 1024 * 1024; /* 1M on G33 */
+	intel_private.gtt = ioremap(temp2, gtt_map_size);
 	if (!intel_private.gtt)
 		return -ENOMEM;