From: Tero Kristo <t-kristo@ti.com>
Date: Thu, 9 Feb 2017 09:25:28 +0000 (+0200)
Subject: clk: ti: dpll44xx: fix clksel register initialization
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=473adbf4e02857a6b78dfb3d9fcf752638bbadb9;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

clk: ti: dpll44xx: fix clksel register initialization

clksel register pointer should be used for the DPLL-MX autoidle handling.
Currently this is not setup at all. Fix by adding proper handling for the
register.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
---

diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c
index c149bd169f43..778bc90955b9 100644
--- a/drivers/clk/ti/dpll.c
+++ b/drivers/clk/ti/dpll.c
@@ -319,6 +319,7 @@ static void _register_dpll_x2(struct device_node *node,
 	struct clk_hw_omap *clk_hw;
 	const char *name = node->name;
 	const char *parent_name;
+	int ret;
 
 	parent_name = of_clk_get_parent_name(node, 0);
 	if (!parent_name) {
@@ -338,6 +339,20 @@ static void _register_dpll_x2(struct device_node *node,
 	init.parent_names = &parent_name;
 	init.num_parents = 1;
 
+	if (hw_ops == &clkhwops_omap4_dpllmx) {
+		/* Check if register defined, if not, drop hw-ops */
+		ret = of_property_count_elems_of_size(node, "reg", 1);
+		if (ret <= 0) {
+			hw_ops = NULL;
+		} else {
+			clk_hw->clksel_reg = ti_clk_get_reg_addr(node, 0);
+			if (IS_ERR(clk_hw->clksel_reg)) {
+				kfree(clk_hw);
+				return;
+			}
+		}
+	}
+
 	/* register the clock */
 	clk = ti_clk_register(NULL, &clk_hw->hw, name);