From: Jeff Garzik Date: Tue, 14 Nov 2006 19:46:17 +0000 (-0500) Subject: [libata] sata_promise: fix TBG mode register offset X-Git-Tag: MMI-PSA29.97-13-9~44978^2~47^2~110^2~40 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=46b027cc30b6f6571191826afc718fa942403fc8;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git [libata] sata_promise: fix TBG mode register offset Fixes crashes on sparc, and may correct weird behavior reported on occasions, because we were never programming this register correctly (or at all). Signed-off-by: Jeff Garzik --- diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c index 72eda5160fad..9c4389b5689a 100644 --- a/drivers/ata/sata_promise.c +++ b/drivers/ata/sata_promise.c @@ -46,15 +46,14 @@ #include "sata_promise.h" #define DRV_NAME "sata_promise" -#define DRV_VERSION "1.04" +#define DRV_VERSION "1.05" enum { PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ - PDC_TBG_MODE = 0x41, /* TBG mode */ + PDC_TBG_MODE = 0x41C, /* TBG mode */ PDC_FLASH_CTL = 0x44, /* Flash control register */ - PDC_PCI_CTL = 0x48, /* PCI control and status register */ PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */