From: Russell King Date: Wed, 6 Nov 2013 17:18:42 +0000 (+0000) Subject: dmaengine: omap-dma: use cached CCR value when enabling DMA X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=45da7b0451b1fe15e882b08c79be58458cbe7a2f;p=GitHub%2FLineageOS%2FG12%2Fandroid_kernel_amlogic_linux-4.9.git dmaengine: omap-dma: use cached CCR value when enabling DMA We don't need to read-modify-write the CCR register; we already know what value it should contain at this point. Use the cached CCR value when setting the enable bit. Acked-by: Tony Lindgren Acked-by: Vinod Koul Signed-off-by: Russell King --- diff --git a/drivers/dma/omap-dma.c b/drivers/dma/omap-dma.c index 49b303296d75..b270aedf1d15 100644 --- a/drivers/dma/omap-dma.c +++ b/drivers/dma/omap-dma.c @@ -181,7 +181,6 @@ static void omap_dma_clear_csr(struct omap_chan *c) static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) { struct omap_dmadev *od = to_omap_dma_dev(c->vc.chan.device); - uint32_t val; if (__dma_omap15xx(od->plat->dma_attr)) c->plat->dma_write(0, CPC, c->dma_ch); @@ -193,9 +192,8 @@ static void omap_dma_start(struct omap_chan *c, struct omap_desc *d) /* Enable interrupts */ c->plat->dma_write(d->cicr, CICR, c->dma_ch); - val = c->plat->dma_read(CCR, c->dma_ch); - val |= CCR_ENABLE; - c->plat->dma_write(val, CCR, c->dma_ch); + /* Enable channel */ + c->plat->dma_write(d->ccr | CCR_ENABLE, CCR, c->dma_ch); } static void omap_dma_stop(struct omap_chan *c)