From: Luca Tettamanti Date: Mon, 28 Dec 2009 21:53:05 +0000 (+0100) Subject: drm/radeon/kms: rs600: use correct mask for SW interrupt X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=43b19f161c7a9941e3aa7db0e3ee19b93980e3d7;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git drm/radeon/kms: rs600: use correct mask for SW interrupt The mask happens to be the same, but the IH is reading the status, not the not the control register. Signed-off-by: Luca Tettamanti Signed-off-by: Dave Airlie --- diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 4f8ea4260572..4245218e954f 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c @@ -396,7 +396,7 @@ int rs600_irq_process(struct radeon_device *rdev) } while (status || r500_disp_int) { /* SW interrupt */ - if (G_000040_SW_INT_EN(status)) + if (G_000044_SW_INT(status)) radeon_fence_process(rdev); /* Vertical blank interrupts */ if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))