From: Ben Dooks Date: Thu, 29 Nov 2007 00:21:29 +0000 (-0800) Subject: S3C24XX: ensure we only configure valid GPIOs X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=438ae1ae7bef17026127b66b1ee16efde93bbcb0;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git S3C24XX: ensure we only configure valid GPIOs If we specify an GPIO which cannot be used for the purpose, then assume that the GPIO is not to be used and do not try and configure it. This can be the case where the SPI bus is TX only. Signed-off-by: Ben Dooks Signed-off-by: David Brownell Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- diff --git a/drivers/spi/spi_s3c24xx_gpio.c b/drivers/spi/spi_s3c24xx_gpio.c index 0fa25e2e80fe..d59105dc308b 100644 --- a/drivers/spi/spi_s3c24xx_gpio.c +++ b/drivers/spi/spi_s3c24xx_gpio.c @@ -96,6 +96,7 @@ static void s3c2410_spigpio_chipselect(struct spi_device *dev, int value) static int s3c2410_spigpio_probe(struct platform_device *dev) { + struct s3c2410_spigpio_info *info; struct spi_master *master; struct s3c2410_spigpio *sp; int ret; @@ -113,7 +114,7 @@ static int s3c2410_spigpio_probe(struct platform_device *dev) platform_set_drvdata(dev, sp); /* copy in the plkatform data */ - sp->info = dev->dev.platform_data; + info = sp->info = dev->dev.platform_data; /* setup spi bitbang adaptor */ sp->bitbang.master = spi_master_get(master); @@ -124,13 +125,18 @@ static int s3c2410_spigpio_probe(struct platform_device *dev) sp->bitbang.txrx_word[SPI_MODE_2] = s3c2410_spigpio_txrx_mode2; sp->bitbang.txrx_word[SPI_MODE_3] = s3c2410_spigpio_txrx_mode3; - /* set state of spi pins */ - s3c2410_gpio_setpin(sp->info->pin_clk, 0); - s3c2410_gpio_setpin(sp->info->pin_mosi, 0); + /* set state of spi pins, always assume that the clock is + * available, but do check the MOSI and MISO. */ + s3c2410_gpio_setpin(info->pin_clk, 0); + s3c2410_gpio_cfgpin(info->pin_clk, S3C2410_GPIO_OUTPUT); - s3c2410_gpio_cfgpin(sp->info->pin_clk, S3C2410_GPIO_OUTPUT); - s3c2410_gpio_cfgpin(sp->info->pin_mosi, S3C2410_GPIO_OUTPUT); - s3c2410_gpio_cfgpin(sp->info->pin_miso, S3C2410_GPIO_INPUT); + if (info->pin_mosi < S3C2410_GPH10) { + s3c2410_gpio_setpin(info->pin_mosi, 0); + s3c2410_gpio_cfgpin(info->pin_mosi, S3C2410_GPIO_OUTPUT); + } + + if (info->pin_miso != S3C2410_GPA0 && info->pin_miso < S3C2410_GPH10) + s3c2410_gpio_cfgpin(info->pin_miso, S3C2410_GPIO_INPUT); ret = spi_bitbang_start(&sp->bitbang); if (ret)