From: Linus Walleij Date: Wed, 10 Aug 2016 08:38:27 +0000 (+0200) Subject: ARM: dts: Add Integrator/CP cpus node and operating points X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=426610dd8cc550ffd947b35c06d3c242cf390008;p=GitHub%2FLineageOS%2Fandroid_kernel_motorola_exynos9610.git ARM: dts: Add Integrator/CP cpus node and operating points This adds the cpus node to the Integrator/CP device tree so that we have a proper placeholder to put in the DT-defined operating points for the generic DT/OPP cpufreq driver, along with two working operating points. I have only put in 48 and 50 MHz because going to e.g. 36 MHz hangs the system when CLCD graphics are active. Presumably the memory bus gets to slow to feed the display and the systems hangs for this reason. The ideal solution would be for the display controller to put constraints on the memory bus frequency, but that need to be a separate longer-term project. We define a CPU node since this is required for cpufreq-dt, however we do not define any compatible string for the CPU since this architecture has pluggable CPU modules and we do not know which one will be used. If necessary, the CPU compatible can be filled in by the boot loader, but for just cpufreq-dt it is not required. Cc: Rafael J. Wysocki Cc: Viresh Kumar Cc: Russell King Signed-off-by: Linus Walleij Signed-off-by: Olof Johansson --- diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts index 1b5e4b006b72..97f38b57a702 100644 --- a/arch/arm/boot/dts/integratorcp.dts +++ b/arch/arm/boot/dts/integratorcp.dts @@ -13,6 +13,32 @@ bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + /* + * Since the board has pluggable CPU modules, we + * cannot define a proper compatible here. Let the + * boot loader fill in the apropriate compatible + * string if necessary. + */ + /* compatible = "arm,arm920t"; */ + reg = <0>; + /* + * TBD comment. + */ + /* kHz uV */ + operating-points = <50000 0 + 48000 0>; + clocks = <&cmcore>; + clock-names = "cpu"; + clock-latency = <1000000>; /* 1 ms */ + }; + }; + /* * The Integrator/CP overall clocking architecture can be found in * ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which