From: Krzysztof Helt <krzysztof.h1@wp.pl>
Date: Tue, 31 Mar 2009 22:25:17 +0000 (-0700)
Subject: cirrusfb: fix threshold register mask for Laguna chips
X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4242a23c9e6b8e2462bb49bf78b76bfdf32158b5;p=GitHub%2Fmoto-9609%2Fandroid_kernel_motorola_exynos9610.git

cirrusfb: fix threshold register mask for Laguna chips

Fix threshold register mask for Laguna chips otherwise some 8bpp modes are
garbled after selecting a 24bpp mode.

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
---

diff --git a/drivers/video/cirrusfb.c b/drivers/video/cirrusfb.c
index a364e1b0dcb7..9bb811d56721 100644
--- a/drivers/video/cirrusfb.c
+++ b/drivers/video/cirrusfb.c
@@ -875,7 +875,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
 		threshold = fb_readw(cinfo->laguna_mmio + 0xea);
 		control &= ~0x6800;
 		format = 0;
-		threshold &= 0xffe0 & 0x3fbf;
+		threshold &= 0xffc0 & 0x3fbf;
 	}
 	if (nom) {
 		tmp = den << 1;