From: Russell King Date: Thu, 6 Jan 2011 22:32:52 +0000 (+0000) Subject: Merge branch 'misc' into devel X-Git-Tag: MMI-PSA29.97-13-9~21441^2~2 X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=4073723acb9cdcdbe4df9c0e0c376c65d1697e43;p=GitHub%2FMotorolaMobilityLLC%2Fkernel-slsi.git Merge branch 'misc' into devel Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c --- 4073723acb9cdcdbe4df9c0e0c376c65d1697e43 diff --cc arch/arm/Kconfig index 2e86b8f62104,6344543974f6..32cbf3e888ff --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@@ -236,8 -235,7 +240,8 @@@ config ARCH_INTEGRATO config ARCH_REALVIEW bool "ARM Ltd. RealView family" select ARM_AMBA - select COMMON_CLKDEV + select CLKDEV_LOOKUP + select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB @@@ -251,8 -249,7 +255,8 @@@ config ARCH_VERSATIL bool "ARM Ltd. Versatile family" select ARM_AMBA select ARM_VIC - select COMMON_CLKDEV + select CLKDEV_LOOKUP + select HAVE_SCHED_CLOCK select ICST select GENERIC_CLOCKEVENTS select ARCH_WANT_OPTIONAL_GPIOLIB @@@ -266,10 -263,9 +270,10 @@@ config ARCH_VEXPRES select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_AMBA select ARM_TIMER_SP804 - select COMMON_CLKDEV + select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select HAVE_CLK + select HAVE_SCHED_CLOCK select ICST select PLAT_VERSATILE help @@@ -441,7 -438,7 +446,8 @@@ config ARCH_IXP4X select CPU_XSCALE select GENERIC_GPIO select GENERIC_CLOCKEVENTS + select HAVE_SCHED_CLOCK + select MIGHT_HAVE_PCI select DMABOUNCE if PCI help Support for Intel's IXP4XX (XScale) family of processors. @@@ -515,9 -512,8 +521,9 @@@ config ARCH_MM bool "Marvell PXA168/910/MMP2" depends on MMU select ARCH_REQUIRE_GPIOLIB - select COMMON_CLKDEV + select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS + select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ @@@ -570,12 -566,11 +576,12 @@@ config ARCH_NUC93 config ARCH_TEGRA bool "NVIDIA Tegra" ++ select CLKDEV_LOOKUP select GENERIC_TIME select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK - select CLKDEV_LOOKUP + select HAVE_SCHED_CLOCK - select COMMON_CLKDEV select ARCH_HAS_BARRIERS if CACHE_L2X0 select ARCH_HAS_CPUFREQ help @@@ -595,10 -590,9 +601,10 @@@ config ARCH_PX depends on MMU select ARCH_MTD_XIP select ARCH_HAS_CPUFREQ - select COMMON_CLKDEV + select CLKDEV_LOOKUP select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS + select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ @@@ -1335,8 -1322,8 +1347,8 @@@ config H default 100 config THUMB2_KERNEL - bool "Compile the kernel in Thumb-2 mode" + bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)" - depends on CPU_V7 && EXPERIMENTAL + depends on CPU_V7 && !CPU_V6 && EXPERIMENTAL select AEABI select ARM_ASM_UNIFIED help diff --cc arch/arm/kernel/Makefile index fd3ec49bfba6,0e1067957029..7c33e6f29bcc --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile @@@ -29,8 -29,7 +29,8 @@@ obj-$(CONFIG_MODULES) += armksyms.o mo obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o +obj-$(CONFIG_HAVE_SCHED_CLOCK) += sched_clock.o - obj-$(CONFIG_SMP) += smp.o + obj-$(CONFIG_SMP) += smp.o smp_tlb.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o obj-$(CONFIG_HAVE_ARM_TWD) += smp_twd.o obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o diff --cc arch/arm/kernel/head.S index 6bd82d25683c,359e54e83bd5..f17d9a09e8fb --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@@ -89,8 -88,12 +89,13 @@@ ENTRY(stext beq __error_p @ yes, error 'p' bl __lookup_machine_type @ r5=machinfo movs r8, r5 @ invalid machine (r5=0)? + THUMB( it eq ) @ force fixup-able long branch encoding beq __error_a @ yes, error 'a' + + /* + * r1 = machine no, r2 = atags, + * r8 = machinfo, r9 = cpuid, r10 = procinfo + */ bl __vet_atags #ifdef CONFIG_SMP_ON_UP bl __fixup_smp @@@ -408,18 -407,24 +413,25 @@@ __fixup_smp __fixup_smp_on_up: adr r0, 1f - ldmia r0, {r3, r6, r7} + ldmia r0, {r3 - r5} sub r3, r0, r3 - add r6, r6, r3 - add r7, r7, r3 - 2: cmp r6, r7 - ldmia r6!, {r0, r4} - strlo r4, [r0, r3] - blo 2b - mov pc, lr + add r4, r4, r3 + add r5, r5, r3 + 2: cmp r4, r5 + movhs pc, lr + ldmia r4!, {r0, r6} + ARM( str r6, [r0, r3] ) + THUMB( add r0, r0, r3 ) + #ifdef __ARMEB__ + THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian. + #endif + THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords + THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3. + THUMB( strh r6, [r0] ) + b 2b ENDPROC(__fixup_smp) + .align 1: .word . .word __smpalt_begin .word __smpalt_end diff --cc arch/arm/kernel/irq.c index 6d616333340f,c1269944cc59..8135438b8818 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c @@@ -35,9 -35,9 +35,10 @@@ #include #include #include +#include #include + #include #include #include diff --cc arch/arm/kernel/smp.c index b6b78b22031b,5341b0b19701..5ec79b4ff950 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@@ -537,71 -582,44 +582,44 @@@ static void ipi_cpu_stop(unsigned int c /* * Main handler for inter-processor interrupts - * - * For ARM, the ipimask now only identifies a single - * category of IPI (Bit 1 IPIs have been replaced by a - * different mechanism): - * - * Bit 0 - Inter-processor function call */ - asmlinkage void __exception_irq_entry do_IPI(struct pt_regs *regs) -asmlinkage void __exception do_IPI(int ipinr, struct pt_regs *regs) ++asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) { unsigned int cpu = smp_processor_id(); - struct ipi_data *ipi = &per_cpu(ipi_data, cpu); struct pt_regs *old_regs = set_irq_regs(regs); - ipi->ipi_count++; - - for (;;) { - unsigned long msgs; + if (ipinr >= IPI_TIMER && ipinr < IPI_TIMER + NR_IPI) + __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_TIMER]); - spin_lock(&ipi->lock); - msgs = ipi->bits; - ipi->bits = 0; - spin_unlock(&ipi->lock); - - if (!msgs) - break; - - do { - unsigned nextmsg; - - nextmsg = msgs & -msgs; - msgs &= ~nextmsg; - nextmsg = ffz(~nextmsg); - - switch (nextmsg) { - case IPI_TIMER: - ipi_timer(); - break; + switch (ipinr) { + case IPI_TIMER: + ipi_timer(); + break; - case IPI_RESCHEDULE: - /* - * nothing more to do - eveything is - * done on the interrupt return path - */ - break; + case IPI_RESCHEDULE: + /* + * nothing more to do - eveything is + * done on the interrupt return path + */ + break; - case IPI_CALL_FUNC: - generic_smp_call_function_interrupt(); - break; + case IPI_CALL_FUNC: + generic_smp_call_function_interrupt(); + break; - case IPI_CALL_FUNC_SINGLE: - generic_smp_call_function_single_interrupt(); - break; + case IPI_CALL_FUNC_SINGLE: + generic_smp_call_function_single_interrupt(); + break; - case IPI_CPU_STOP: - ipi_cpu_stop(cpu); - break; + case IPI_CPU_STOP: + ipi_cpu_stop(cpu); + break; - default: - printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", - cpu, nextmsg); - break; - } - } while (msgs); + default: + printk(KERN_CRIT "CPU%u: Unknown IPI message 0x%x\n", + cpu, ipinr); + break; } - set_irq_regs(old_regs); } diff --cc arch/arm/mach-realview/core.c index aad806c5cb12,3d915b1ccdb5..1c6602cf50e4 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@@ -47,14 -47,14 +47,13 @@@ #include - #include #include #include -#include +#include -#include "core.h" +#include -/* used by entry-macro.S and platsmp.c */ -void __iomem *gic_cpu_base_addr; +#include "core.h" #ifdef CONFIG_ZONE_DMA /* diff --cc arch/arm/mach-s5pv310/include/mach/smp.h index e1cc6a251c6a,77e5a841f741..393ccbd52c4a --- a/arch/arm/mach-s5pv310/include/mach/smp.h +++ b/arch/arm/mach-s5pv310/include/mach/smp.h @@@ -7,8 -7,9 +7,7 @@@ #define ASM_ARCH_SMP_H __FILE__ #include - #include -extern void __iomem *gic_cpu_base_addr; - /* * We use IRQ1 as the IPI */ diff --cc arch/arm/mach-versatile/core.c index 40a024c71e4b,8c1ca1d63538..13a83e45a33b --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@@ -46,12 -46,9 +46,11 @@@ #include #include #include - #include #include #include -#include +#include + +#include #include "core.h" diff --cc arch/arm/mach-vexpress/ct-ca9x4.c index cb5793ef3ee0,f4455e3ed6a4..e628402b754c --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@@ -18,10 -18,9 +18,9 @@@ #include #include - #include #include -#include +#include #include #include diff --cc arch/arm/mach-vexpress/v2m.c index de13603dc028,d374a78986e8..a9ed3428a2fa --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c @@@ -18,12 -18,10 +18,11 @@@ #include #include #include +#include - #include #include -#include +#include #include "core.h"