From: Yoichi Yuasa Date: Fri, 11 May 2007 12:43:09 +0000 (+0900) Subject: [MIPS] Rework cobalt_board_id X-Git-Url: https://git.stricted.de/?a=commitdiff_plain;h=3f2d560e9029ec0b7edf8be0c32425f4bb57d582;p=GitHub%2Fexynos8895%2Fandroid_kernel_samsung_universal8895.git [MIPS] Rework cobalt_board_id This patch has reworked cobalt_board_id. The cobalt_board_id is read from PCI config register. It should be in PCI routine. Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- diff --git a/arch/mips/cobalt/setup.c b/arch/mips/cobalt/setup.c index e2f53abfb440..7abe45e78425 100644 --- a/arch/mips/cobalt/setup.c +++ b/arch/mips/cobalt/setup.c @@ -10,7 +10,6 @@ * */ #include -#include #include #include @@ -26,8 +25,6 @@ extern void cobalt_machine_restart(char *command); extern void cobalt_machine_halt(void); extern void cobalt_machine_power_off(void); -int cobalt_board_id; - const char *get_system_type(void) { switch (cobalt_board_id) { @@ -92,7 +89,6 @@ static struct resource cobalt_reserved_resources[] = { void __init plat_mem_setup(void) { - unsigned int devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0); int i; _machine_restart = cobalt_machine_restart; @@ -107,14 +103,6 @@ void __init plat_mem_setup(void) /* These resources have been reserved by VIA SuperI/O chip. */ for (i = 0; i < ARRAY_SIZE(cobalt_reserved_resources); i++) request_resource(&ioport_resource, cobalt_reserved_resources + i); - - /* Read the cobalt id register out of the PCI config space */ - PCI_CFG_SET(devfn, (VIA_COBALT_BRD_ID_REG & ~0x3)); - cobalt_board_id = GT_READ(GT_PCI0_CFGDATA_OFS); - cobalt_board_id >>= ((VIA_COBALT_BRD_ID_REG & 3) * 8); - cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id); - - printk("Cobalt board ID: %d\n", cobalt_board_id); } /* diff --git a/arch/mips/pci/fixup-cobalt.c b/arch/mips/pci/fixup-cobalt.c index f4acae694a5a..d57ffd7242ca 100644 --- a/arch/mips/pci/fixup-cobalt.c +++ b/arch/mips/pci/fixup-cobalt.c @@ -113,6 +113,27 @@ static void qube_raq_galileo_fixup(struct pci_dev *dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_GT64111, qube_raq_galileo_fixup); +int cobalt_board_id; + +static void qube_raq_via_board_id_fixup(struct pci_dev *dev) +{ + u8 id; + int retval; + + retval = pci_read_config_byte(dev, VIA_COBALT_BRD_ID_REG, &id); + if (retval) { + panic("Cannot read board ID"); + return; + } + + cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(id); + + printk(KERN_INFO "Cobalt board ID: %d\n", cobalt_board_id); +} + +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, + qube_raq_via_board_id_fixup); + static char irq_tab_qube1[] __initdata = { [COBALT_PCICONF_CPU] = 0, [COBALT_PCICONF_ETH0] = COBALT_QUBE1_ETH0_IRQ,